ATMEGA3250PV-10AUR Atmel, ATMEGA3250PV-10AUR Datasheet - Page 38

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ATMEGA3250PV-10AUR

Manufacturer Part Number
ATMEGA3250PV-10AUR
Description
MCU AVR 32K FLASH 10MHZ 100TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA3250PV-10AUR

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA3250PV-10AUR
Manufacturer:
Atmel
Quantity:
10 000
9. Power Management and Sleep Modes
9.1
9.2
8023F–AVR–07/09
Overview
Sleep Modes
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving-
power. The AVR provides various sleep modes allowing the user to tailor the power
consumption to the application’s requirements.
When enabled, the Brown-out Detector (BOD) actively monitors the power supply voltage during
the sleep periods. To further save power, it is possible to disable the BOD in some sleep modes.
See
Figure 8-1 on page 29
their distribution. The figure is helpful in selecting an appropriate sleep mode.
the different sleep modes, their wake up sources and BOD disable ability.
Table 9-1.
Notes:
To enter any of the sleep modes, the SE bit in SMCR must be written to logic one and a SLEEP
instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select which
sleep mode will be activated by the SLEEP instruction. See
summary.
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
Sleep Mode
Idle
ADCNRM
Power-down
Power-save
Standby
”BOD Disable” on page 39
1. Only recommended with external crystal or resonator selected as clock source.
2. If Timer/Counter2 is running in asynchronous mode.
3. For INT0, only level interrupt.
(1)
Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Active Clock Domains
presents the different clock systems in the ATmega325P/3250P, and
X
for more details.
X
X
X
X
X
Oscillators
X
X
X
X
X
X
(2)
(2)
(2)
X
X
X
X
X
(3)
(3)
(3)
(3)
ATmega325P/3250P
X
X
X
X
X
Wake-up Sources
X
Table 9-2 on page 43
X
X
(2)
X
X
X
X
Table 9-1
X
X
X
X
X
X
shows
for a
X
X
X
38

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