PIC18LF27J53-I/ML Microchip Technology, PIC18LF27J53-I/ML Datasheet - Page 147

• Manufacturer Part Number: PIC18LF27J53-I/ML
• Description: IC PIC MCU 128KB FLASH 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF27J53-I/ML

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 2.75 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Controller Family/series: PIC18
• Cpu Speed: 48MHz
• Digital Ic Case Style: QFN
• Supply Voltage Range: 1.8V To 3.6V
• Embedded Interface Type: I2C, SPI, USART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

TABLE 10-11: PORTD I/O SUMMARY
 2010 Microchip Technology Inc.
RD0/SCK2/SCL2/AN20
RD1/CCP4/SDI2/SDA2/
AN21
RD2/P2B/AN22
RD3/P2C/SS2/AN23
RD4/P2D/SDO2/AN24
RD5/P1B/AN25
Legend:
Note 1:
Pin Name
AN = Analog input or output; TTL = TTL compatible input; HV = High Voltage; OD = Open Drain; XTAL = Crystal; CMOS
= CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels; I
Default pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are set.
Function
P2B
SCK2
CCP4
SDA2
SDO2
SCL2
AN20
AN21
AN22
AN23
AN24
AN25
SDI2
RD0
RD1
RD2
RD3
P2C
SS2
RD4
P2D
RD5
P1B
(1)
Setting
TRIS
0
1
0
1
0
1
1
0
1
0
1
1
0
1
1
0
1
0
1
0
1
0
1
1
0
1
0
0
1
0
1
0
1
ANSEL
setting
0
0
0
0
0
0
1
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
1
Preliminary
Type
Pin
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Buffer
Type
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
TTL
DIG
DIG
DIG
DIG
DIG
I2C
I
ST
ST
AN
ST
ST
ST
AN
ST
AN
ST
AN
ST
AN
ST
AN
2
C
PIC18(L)F2X/4XK22
LATD<0> data output; not affected by analog input.
PORTD<0> data input; disabled when analog input
enabled.
MSSP2 SPI Clock output.
MSSP2 SPI Clock input.
MSSP2 I
MSSP2 I
Analog input 20.
LATD<1> data output; not affected by analog input.
PORTD<1> data input; disabled when analog input
enabled.
Compare 4 output/PWM 4 output.
Capture 4 input.
MSSP2 SPI data input.
MSSP2 I
MSSP2 I
Analog input 21.
LATD<2> data output; not affected by analog input.
PORTD<2> data input; disabled when analog input
enabled.
Enhanced CCP2 PWM output 2.
Analog input 22.
LATD<3> data output; not affected by analog input.
PORTD<3> data input; disabled when analog input
enabled.
Enhanced CCP2 PWM output 4.
MSSP2 SPI slave select input.
Analog input 23.
LATD<4> data output; not affected by analog input.
PORTD<4> data input; disabled when analog input
enabled.
Enhanced CCP2 PWM output 3.
MSSP2 SPI data output.
Analog input 24.
LATD<5> data output; not affected by analog input.
PORTD<5> data input; disabled when analog input
enabled.
Enhanced CCP1 PWM output 2.
Analog input 25.
2
2
2
2
C™ Clock output.
C™ Clock input.
C™ data output.
C™ data input.
2
C
TM
Description
= S
chmitt Trigger input with I
DS41412D-page 147
2
C.