PIC18LF27J53-I/ML Microchip Technology, PIC18LF27J53-I/ML Datasheet - Page 18

• Manufacturer Part Number: PIC18LF27J53-I/ML
• Description: IC PIC MCU 128KB FLASH 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF27J53-I/ML

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 2.75 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Controller Family/series: PIC18
• Cpu Speed: 48MHz
• Digital Ic Case Style: QFN
• Supply Voltage Range: 1.8V To 3.6V
• Embedded Interface Type: I2C, SPI, USART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18(L)F2X/4XK22
TABLE 1-2:
DS41412D-page 18
Legend:
Note 1:
PDIP,
SOIC
Pin Number
21
22
23
24
9
2:
UQFN
QFN,
18
19
20
21
TTL = TTL compatible input CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;
I = Input; O = Output; P = Power.
Default pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are set.
Alternate pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are clear.
6
RA7/CLKI/OSC1
RB0/INT0/CCP4/FLT0/SRI/SS2/AN12
RB1/INT1/P1C/SCK2/SCL2/C12IN3-/AN10
RB2/INT2/CTED1/P1B/SDI2/SDA2/AN8
RB3/CTED2/P2A/CCP2/SDO2/C12IN2-/AN9
PIC18(L)F2XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
C12IN3-
CCP2
C12IN2-
CTED1
CTED2
OSC1
SDO2
CCP4
SCK2
SDA2
AN12
SCL2
AN10
FLT0
CLKI
INT0
INT1
INT2
SDI2
RA7
RB0
SS2
RB1
P1C
RB2
P1B
AN8
RB3
P2A
AN9
SRI
(2)
Preliminary
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Analog Analog input 12.
Analog Comparators C1 and C2 inverting input.
Analog Analog input 10.
Analog Analog input 8.
Analog Comparators C1 and C2 inverting input.
Analog Analog input 9.
CMOS
CMOS
CMOS
CMOS
Buffer
Type
TTL
TTL
TTL
TTL
TTL
TTL
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
Digital I/O.
External clock source input. Always associated with pin
function OSC1.
Oscillator crystal input or external clock source input ST
buffer when configured in RC mode; CMOS otherwise.
Digital I/O.
External interrupt 0.
Capture 4 input/Compare 4 output/PWM 4 output.
PWM Fault input for ECCP Auto-Shutdown.
SR Latch input.
SPI slave select input (MSSP2).
Digital I/O.
External interrupt 1.
Enhanced CCP1 PWM output.
Synchronous serial clock input/output for SPI mode
(MSSP2).
Synchronous serial clock input/output for I
(MSSP2).
Digital I/O.
External interrupt 2.
CTMU Edge 1 input.
Enhanced CCP1 PWM output.
SPI data in (MSSP2).
I
Digital I/O.
CTMU Edge 2 input.
Enhanced CCP2 PWM output.
Capture 2 input/Compare 2 output/PWM 2 output.
SPI data out (MSSP2).
2
C™ data I/O (MSSP2).
Description
 2010 Microchip Technology Inc.
2
C™ mode