PIC18LF27J53-I/ML Microchip Technology, PIC18LF27J53-I/ML Datasheet - Page 361

IC PIC MCU 128KB FLASH 28QFN

PIC18LF27J53-I/ML

Manufacturer Part Number
PIC18LF27J53-I/ML
Description
IC PIC MCU 128KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18LF27J53-I/ML

Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 2.75 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
QFN
Supply Voltage Range
1.8V To 3.6V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF27J53-I/ML
Manufacturer:
ATMEL
Quantity:
101
24.2.1
Register 24-14
readable and writable register which contains a control
bit that allows software to override the WDT enable
Configuration bit, but only if the Configuration bit has
disabled the WDT.
REGISTER 24-14: WDTCON: WATCHDOG TIMER CONTROL REGISTER
TABLE 24-3:
TABLE 24-4:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-1
bit 0
Note 1:
RCON
WDTCON
Legend: — = unimplemented, read as ‘0’. Shaded bits are not used by the Watchdog Timer.
CONFIG2H
Legend: — = unimplemented, read as ‘0’. Shaded bits are not used by the Watchdog Timer.
Name
Name
U-0
This bit has no effect if the Configuration bit, WDTEN, is enabled.
CONTROL REGISTER
shows the WDTCON register. This is a
Unimplemented: Read as ‘0’
SWDTEN: Software Enable or Disable the Watchdog Timer bit
1 = WDT is turned on
0 = WDT is turned off (Reset value)
IPEN
Bit 7
Bit 7
REGISTERS ASSOCIATED WITH WATCHDOG TIMER
CONFIGURATION REGISTERS ASSOCIATED WITH WATCHDOG TIMER
U-0
SBOREN
Bit 6
Bit 6
W = Writable bit
‘1’ = Bit is set
U-0
Bit 5
Bit 5
U-0
Preliminary
Bit 4
Bit 4
RI
WDPS<3:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
Bit 3
Bit 3
U-0
TO
PIC18(L)F2X/4XK22
Bit 2
Bit 2
PD
(1)
U-0
Bit 1
POR
Bit 1
WDTEN<1:0>
x = Bit is unknown
U-0
SWDTEN
Bit 0
BOR
Bit 0
DS41412D-page 361
SWDTEN
R/W-0
on Page
on Page
Values
Values
Reset
Reset
361
353
60
bit 0
(1)

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