PIC18LF47J53-I/ML Microchip Technology, PIC18LF47J53-I/ML Datasheet - Page 143

• Manufacturer Part Number: PIC18LF47J53-I/ML
• Description: IC PIC MCU 128KB FLASH 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF47J53-I/ML

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 2.75 V
• Data Converters: A/D 13x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Controller Family/series: PIC18
• Cpu Speed: 48MHz
• Digital Ic Case Style: QFN
• Supply Voltage Range: 1.8V To 3.6V
• Embedded Interface Type: I2C, SPI, USART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

TABLE 10-8:
 2010 Microchip Technology Inc.
RC0/P2B/T3CKI/T3G/
T1CKI/SOSCO
RC1/P2A/CCP2/SOSCI
RC2/CTPLS/P1A/
CCP1/T5CKI/AN14
RC3/SCK1/SCL1/AN15
RC4/SDI1/SDA1/AN16
Legend:
Note 1:
Pin Name
2:
3:
AN = Analog input or output; TTL = TTL compatible input; HV = High Voltage; OD = Open Drain; XTAL = Crystal; CMOS =
CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels; I
Default pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are set.
Alternate pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are clear.
Function on PORTD and PORTE for PIC18(L)F4XK22 devices.
PORTC I/O SUMMARY
Function
T3CKI
SOSCO
CCP2
CTPLS
SOSCI
P2B
T1CKI
T5CKI
CCP1
SCK1
SDA1
AN14
SCL1
AN15
AN16
SDI1
RC0
RC1
RC2
RC3
RC4
T3G
P2A
P1A
(2)
(1)
(1)
Setting
TRIS
0
1
0
1
1
1
x
0
1
0
0
1
x
0
1
0
0
0
1
1
1
0
1
0
1
0
1
1
0
1
1
0
1
1
ANSEL
setting
—
—
—
—
—
—
—
—
—
—
—
—
—
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
1
Preliminary
Type
Pin
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Buffer
XTAL
XTAL
Type
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
I2C
I2C
AN
AN
AN
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
PIC18(L)F2X/4XK22
LATC<0> data output; not affected by analog input.
PORTC<0> data input; disabled when analog input
enabled.
Enhanced CCP2 PWM output 2.
Timer3 clock input.
Timer3 external clock gate input.
Timer1 clock input.
Secondary oscillator output.
LATC<1> data output; not affected by analog input.
PORTC<1> data input; disabled when analog input
enabled.
Enhanced CCP2 PWM output 1.
Compare 2 output/PWM 2 output.
Capture 2 input.
Secondary oscillator input.
LATC<2> data output; not affected by analog input.
PORTC<2> data input; disabled when analog input
enabled.
CTMU pulse generator output.
Enhanced CCP1 PWM output 1.
Compare 1 output/PWM 1 output.
Capture 1 input.
Timer5 clock input.
Analog input 14.
LATC<3> data output; not affected by analog input.
PORTC<3> data input; disabled when analog input
enabled.
MSSP1 SPI Clock output.
MSSP1 SPI Clock input.
MSSP1 I
MSSP1 I
Analog input 15.
LATC<4> data output; not affected by analog input.
PORTC<4> data input; disabled when analog input
enabled.
MSSP1 SPI data input.
MSSP1 I
MSSP1 I
Analog input 16.
2
2
2
2
C™ Clock output.
C™ Clock input.
C™ data output.
C™ data input.
2
C
TM
= Schmitt Trigger input with I
Description
DS41412D-page 143
2
C.