AT89C51RE2-RLTUM Atmel, AT89C51RE2-RLTUM Datasheet - Page 48

• Manufacturer Part Number: AT89C51RE2-RLTUM
• Description: MCU 8051 128K FLASH 44-VQFP
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51RE2-RLTUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 60MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: UART, SPI
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: AT89OCD-01
• Minimum Operating Temperature: - 40 C
• Height: 1.45 mm
• Length: 10.1 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 10.1 mm
• For Use With: AT89STK-11 - KIT STARTER FOR AT89C51RX2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Reading the Flash
Spaces
User
Extra Row (XAF)
Hardware Security Byte
48
AT89C51RE2
The following procedure is used to read the User space:
•
Note:
Depending of the MBO2:0 bits, the MOVC A,@A+DPTR can address a specific upper 32K bytes
bank. It allows to read the 32K bytes upper On-chip flash memory from one bank to another one.
When read from the bootloader area, the user memory shall be mapped before any read access
by setting the FMR bit of the FSTA register.
By default, when the bootloader is entered by hardware conditions, the ROM area is mapped for
MOVC A,@A+DPTR operations. It is necessary to remap the user memory before each read
access.
The following procedure is used to read the Extra Row space and is summarized in Figure 17:
•
•
•
Figure 17. XAF Reading Procedure
The following procedure is used to read the Hardware
rized in Figure 18:
•
•
•
Read one byte in Accumulator by executing MOVC A,@A+DPTR
Map the Extra Row space by writing 01h in FCON register.
Read one byte in Accumulator by executing MOVC A,@A+DPTR with A= 0 & DPTR= 0000h
to 007Fh.
Clear FCON to unmap the Extra Row.
Map the Hardware Security space by writing 04h in FCON register.
Read the byte in Accumulator by executing MOVC A,@A+DPTR with A= 0 & DPTR= 0000h.
Clear FCON to unmap the Hardware Security Byte.
FCON is supposed to be reset when not needed.
Exec: MOVC A, @A+DPTR
DPTR= @ (00h up to 7Fh
FCON = 00h (FPS = 0)
XRAW Unmapping
XRAW Reading
XRAW Mapping
FCON = 01h
Data Read
ACC= 0
Security
space and is summa-
7663E–8051–10/08