ATMEGA1280V-8AUR Atmel, ATMEGA1280V-8AUR Datasheet - Page 194
ATMEGA1280V-8AUR
Manufacturer Part Number
ATMEGA1280V-8AUR
Description
MCU AVR 128K FLASH 8MHZ 100TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA1280V-8AUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
86
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
For Use With
ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFPATSTK503 - STARTER KIT AVR EXP MODULE 100P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Manufacturer
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Price
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19.10.9
2549M–AVR–09/10
GTCCR – General Timer/Counter Control Register
• Bit 0 – TOV2: Timer/Counter2 Overflow Flag
The TOV2 bit is set (one) when an overflow occurs in Timer/Counter2. TOV2 is cleared by hard-
ware when executing the corresponding interrupt handling vector. Alternatively, TOV2 is cleared
by writing a logic one to the flag. When the SREG I-bit, TOIE2A (Timer/Counter2 Overflow Inter-
rupt Enable), and TOV2 are set (one), the Timer/Counter2 Overflow interrupt is executed. In
PWM mode, this bit is set when Timer/Counter2 changes counting direction at 0x00.
Bit
0x23 (0x43)
Read/Write
Initial Value
• Bit 1 – PSRASY: Prescaler Reset Timer/Counter2
When this bit is one, the Timer/Counter2 prescaler will be reset. This bit is normally cleared
immediately by hardware. If the bit is written when Timer/Counter2 is operating in asynchronous
mode, the bit will remain one until the prescaler has been reset. The bit will not be cleared by
hardware if the TSM bit is set. Refer to the description of the
chronization Mode” on page 170
TSM
R/W
7
0
R
6
–
0
ATmega640/1280/1281/2560/2561
for a description of the Timer/Counter Synchronization mode.
R
5
–
0
R
4
–
0
R
3
–
0
“Bit 7 – TSM: Timer/Counter Syn-
R
2
–
0
PSRASY
R/W
1
0
PSRSYNC
R/W
0
0
GTCCR
194
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