ATMEGA1280V-8AUR Atmel, ATMEGA1280V-8AUR Datasheet - Page 326

MCU AVR 128K FLASH 8MHZ 100TQFP

ATMEGA1280V-8AUR

Manufacturer Part Number
ATMEGA1280V-8AUR
Description
MCU AVR 128K FLASH 8MHZ 100TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA1280V-8AUR

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
86
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
For Use With
ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFPATSTK503 - STARTER KIT AVR EXP MODULE 100P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA1280V-8AUR
Manufacturer:
Atmel
Quantity:
10 000
28.6.11
28.6.12
2549M–AVR–09/10
Preventing Flash Corruption
Programming Time for Flash when Using SPM
SPMCSR, the signature byte value will be loaded in the destination register. The SIGRD and
SPMEN bits will auto-clear upon completion of reading the Signature Row Lock bits or if no LPM
instruction is executed within three CPU cycles. When SIGRD and SPMEN are cleared, LPM will
work as described in the Instruction set Manual.
Table 28-5.
Note:
During periods of low V
too low for the CPU and the Flash to operate properly. These issues are the same as for board
level systems using the Flash, and the same design solutions should be applied.
A Flash program corruption can be caused by two situations when the voltage is too low. First, a
regular write sequence to the Flash requires a minimum voltage to operate correctly. Secondly,
the CPU itself can execute instructions incorrectly, if the supply voltage for executing instructions
is too low.
Flash corruption can easily be avoided by following these design recommendations (one is
sufficient):
1. If there is no need for a Boot Loader update in the system, program the Boot Loader Lock
2. Keep the AVR RESET active (low) during periods of insufficient power supply voltage.
3. Keep the AVR core in Power-down sleep mode during periods of low V
The calibrated RC Oscillator is used to time Flash accesses.
gramming time for Flash accesses from the CPU.
Table 28-6.
Signature Byte
Device Signature Byte 1
Device Signature Byte 2
Device Signature Byte 3
RC Oscillator Calibration Byte
Flash write (Page Erase, Page Write, and
write Lock bits by SPM)
bits to prevent any Boot Loader software updates.
This can be done by enabling the internal Brown-out Detector (BOD) if the operating volt-
age matches the detection level. If not, an external low V
used. If a reset occurs while a write operation is in progress, the write operation will be
completed provided that the power supply voltage is sufficient.
vent the CPU from attempting to decode and execute instructions, effectively protecting
the SPMCSR Register and thus the Flash from unintentional writes.
All other addresses are reserved for future use.
Signature Row Addressing
SPM Programming Time
Symbol
CC
, the Flash program can be corrupted because the supply voltage is
ATmega640/1280/1281/2560/2561
Min Programming Time
3.7 ms
CC
Table 28-6
reset protection circuit can be
Z-Pointer Address
0x0000
0x0002
0x0004
0x0001
Max Programming Time
shows the typical pro-
CC
. This will pre-
4.5 ms
326

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