ATMEGA1280V-8AUR Atmel, ATMEGA1280V-8AUR Datasheet - Page 295

• Manufacturer Part Number: ATMEGA1280V-8AUR
• Description: MCU AVR 128K FLASH 8MHZ 100TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA1280V-8AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFPATSTK503 - STARTER KIT AVR EXP MODULE 100P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

25.8.6
25.8.7
2549M–AVR–09/10
DIDR0 – Digital Input Disable Register 0
DIDR2 – Digital Input Disable Register 2
ger source that is cleared to a trigger source that is set, will generate a positive edge on the
trigger signal. If ADEN in ADCSRA is set, this will start a conversion. Switching to Free Running
mode (ADTS[2:0]=0) will not cause a trigger event, even if the ADC Interrupt Flag is set
Table 25-6.
Note:
• Bit 7:0 – ADC7D:ADC0D: ADC7:0 Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is dis-
abled. The corresponding PIN Register bit will always read as zero when this bit is set. When an
analog signal is applied to the ADC7:0 pin and the digital input from this pin is not needed, this
bit should be written logic one to reduce power consumption in the digital input buffer.
• Bit 7:0 – ADC15D:ADC8D: ADC15:8 Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is dis-
abled. The corresponding PIN Register bit will always read as zero when this bit is set. When an
analog signal is applied to the ADC15:8 pin and the digital input from this pin is not needed, this
bit should be written logic one to reduce power consumption in the digital input buffer.
Bit
(0x7E)
Read/Write
Initial Value
Bit
(0x7D)
Read/Write
Initial Value
ADTS2
Free running mode cannot be used for differential channels (see chapter
on page
0
0
0
0
1
1
1
1
ADC15D
ADC7D
ADC Auto Trigger Source Selections
R/W
R/W
7
0
7
0
281).
ADC14D
ADC6D
R/W
R/W
ADTS1
6
0
6
0
0
0
1
1
0
0
1
1
ADC13D
ATmega640/1280/1281/2560/2561
ADC5D
R/W
R/W
5
0
5
0
ADC12D
ADC4D
R/W
R/W
ADTS0
4
0
4
0
0
1
0
1
0
1
0
1
ADC11D
ADC3D
R/W
R/W
3
0
3
0
Trigger Source
Free Running mode
Analog Comparator
External Interrupt Request 0
Timer/Counter0 Compare Match A
Timer/Counter0 Overflow
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter1 Capture Event
ADC10D
ADC2D
R/W
R/W
2
0
2
0
ADC1D
ADC9D
R/W
R/W
1
0
1
0
“Differential Channels”
ADC0D
ADC8D
R/W
R/W
0
0
0
0
.
DIDR0
DIDR2
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