PIC17LC756A-08I/PT Microchip Technology, PIC17LC756A-08I/PT Datasheet - Page 114

• Manufacturer Part Number: PIC17LC756A-08I/PT
• Description: IC MCU OTP 16KX16 A/D 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17LC756A-08I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Oscillator Type: External
• Core Processor: PIC
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: OTP
• Ram Size: 902 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC17
• No. Of I/o's: 50
• Ram Memory Size: 902Byte
• Cpu Speed: 33MHz
• No. Of Timers: 4
• No. Of Pwm: RoHS Compliant
• Processor Series: PIC17LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 902 B
• Interface Type: I2C, MSSP, RS- 232, SCI, SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 8
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC17LC756A-08IPT

PIC17C7XX
13.2.4
When TMR3CS is set, the 16-bit TMR3 increments on
the falling edge of clock input TCLK3. The input on the
RB5/TCLK3 pin is sampled and synchronized by the
internal phase clocks, twice every instruction cycle.
This causes a delay from the time a falling edge
appears on TCLK3 to the time TMR3 is actually incre-
mented. For the external clock input timing require-
ments, see the Electrical Specification section.
Figure 13-7 shows the timing diagram when operating
from an external clock.
EXAMPLE 13-2:
EXAMPLE 13-3:
FIGURE 13-7:
DS30289B-page 114
PR1, PR2, or PR3H:PR3L
BSF
MOVFP
MOVFP
BCF
MOVPF
MOVPF
MOVFP
CPFSLT
RETURN
MOVPF
MOVPF
RETURN
TMR1, TMR2, or TMR3
EXTERNAL CLOCK INPUT FOR
TIMER3
CPUSTA, GLINTD
RAM_L,
RAM_H,
CPUSTA, GLINTD
TMR3L, TMPLO
TMR3H, TMPHI
TMPLO, WREG
TMR3L
TMR3L, TMPLO
TMR3H, TMPHI
Instruction
Executed
WR_TMR
or TCLK3
RD_TMR
TCLK12
TMRxIF
WRITING TO TMR3
READING FROM TMR3
TIMER1, TIMER2 AND TIMER3 OPERATION (IN COUNTER MODE)
TMR3L
TMR3H
Q1Q2Q3Q4 Q1Q2Q3Q4 Q1Q2Q3Q4 Q1Q2Q3Q4 Q1Q2Q3Q4Q1Q2Q3Q4
Note 1: TCLK12 is sampled in Q2 and Q4.
’A9h’
34h
3: The latency from TCLK12
2:
; read low TMR3
; read high TMR3
; tmplo
; TMR3L < wreg?
; no then return
; read low TMR3
; read high TMR3
; return
; Disable interrupts
;
;
; Done, enable interrupts
indicates a sampling point.
Write to TMRx
MOVWF
TMRx
35h
wreg
Read TMRx
TMRx,W
MOVFP
A8h
13.2.5
Since Timer3 is a 16-bit timer and only 8-bits at a time
can be read or written, care should be taken when
reading or writing while the timer is running. The best
method is to stop the timer, perform any read or write
operation and then restart Timer3 (using the TMR3ON
bit). However, if it is necessary to keep Timer3 free-
running, care must be taken. For writing to the 16-bit
TMR3, Example 13-2 may be used. For reading the 16-
bit TMR3, Example 13-3 may be used. Interrupts must
be disabled during this routine.
to timer increment is between 2Tosc and 6Tosc.
Read TMRx
TMRx,W
MOVFP
READING/WRITING TIMER3
A9h
2000 Microchip Technology Inc.
’A9h’
00h