PIC17LC756A-08I/PT Microchip Technology, PIC17LC756A-08I/PT Datasheet - Page 136

• Manufacturer Part Number: PIC17LC756A-08I/PT
• Description: IC MCU OTP 16KX16 A/D 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17LC756A-08I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Oscillator Type: External
• Core Processor: PIC
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: OTP
• Ram Size: 902 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC17
• No. Of I/o's: 50
• Ram Memory Size: 902Byte
• Cpu Speed: 33MHz
• No. Of Timers: 4
• No. Of Pwm: RoHS Compliant
• Processor Series: PIC17LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 902 B
• Interface Type: I2C, MSSP, RS- 232, SCI, SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 8
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC17LC756A-08IPT

PIC17C7XX
REGISTER 15-3: SSPCON2: SYNC SERIAL PORT CONTROL REGISTER2 (ADDRESS 12h, BANK 6)
DS30289B-page 136
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
bit 7
GCEN: General Call Enable bit (in I
1 = Enable interrupt when a general call address (0000h) is received in the SSPSR
0 = General call address disabled
ACKSTAT: Acknowledge Status bit (in I
In Master Transmit mode:
1 = Acknowledge was not received from slave
0 = Acknowledge was received from slave
ACKDT: Acknowledge Data bit (in I
In Master Receive mode:
Value that will be transmitted when the user initiates an Acknowledge sequence at the end of a
receive.
1 = Not Acknowledge
0 = Acknowledge
ACKEN: Acknowledge Sequence Enable bit (in I
In Master Receive mode:
1 = Initiate Acknowledge sequence on SDA and SCL pins and transmit AKDT data bit.
0 = Acknowledge sequence idle
RCEN: Receive Enable bit (in I
1 = Enables Receive mode for I
0 = Receive idle
PEN: STOP Condition Enable bit (in I
SCK Release Control:
1 = Initiate STOP condition on SDA and SCL pins. Automatically cleared by hardware.
0 = STOP condition idle
RSEN: Repeated Start Condition Enabled bit (in I
1 = Initiate Repeated Start condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Repeated Start condition idle
SEN: START Condition Enabled bit (In I
1 = Initiate START condition on SDA and SCL pins. Automatically cleared by hardware.
0 = START condition idle.
Legend:
R = Readable bit
- n = Value at POR Reset
R/W-0
GCEN
Note:
Note:
Note:
Note:
Note:
Automatically cleared by hardware.
If the I
the SSPBUF may not be written (or writes to the SSPBUF are disabled).
If the I
the SSPBUF may not be written (or writes to the SSPBUF are disabled).
If the I
the SSPBUF may not be written (or writes to the SSPBUF are disabled).
If the I
the SSPBUF may not be written (or writes to the SSPBUF are disabled).
If the I
the SSPBUF may not be written (or writes to the SSPBUF are disabled).
ACKSTAT
R/W-0
2
2
2
2
2
C module is not in the IDLE mode, this bit may not be set (no spooling) and
C module is not in the IDLE mode, this bit may not be set (no spooling) and
C module is not in the IDLE mode, this bit may not be set (no spooling) and
C module is not in the IDLE mode, this bit may not be set (no spooling) and
C module is not in the IDLE mode, this bit may not be set (no spooling) and
ACKDT
R/W-0
W = Writable bit
’1’ = Bit is set
2
2
C Master mode only)
C
2
2
C Master mode only)
C Slave mode only)
2
ACKEN
C Master mode only)
R/W-0
2
2
C Master mode only)
C Master mode only)
2
2
C Master mode only)
C Master mode only)
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-0
RCEN
R/W-0
PEN
2000 Microchip Technology Inc.
x = Bit is unknown
R/W-0
RSEN
R/W-0
SEN
bit 0