AT91SAM7X128B-AU Atmel, AT91SAM7X128B-AU Datasheet - Page 21

• Manufacturer Part Number: AT91SAM7X128B-AU
• Description: IC MCU 128KB FLASH 100LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7X128B-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: JTAG, SPI, UART
• Maximum Clock Frequency: 55 MHz
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7X-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AT91SAM7xxxxx
• No. Of I/o's: 62
• Ram Memory Size: 32KB
• Cpu Speed: 55MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Cpu Family: 91S
• Device Core: ARM7TDMI
• Device Core Size: 32b
• Frequency (max): 55MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 62
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.65/3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

8.5.3
8.5.3.1
8.5.3.2
8.5.3.3
8.5.4
6120FS–ATARM–17-Feb-09
Lock Regions
Security Bit Feature
AT91SAM7X512
AT91SAM7X256
AT91SAM7X128
plane may be performed even while program or erase functions are being executed in the other
memory plane.
One EFC is embedded in the AT91SAM7X256/128 to control the single plane of 256/128
KBytes.
Two Embedded Flash Controllers each manage 16 lock bits to protect 16 regions of the flash
against inadvertent flash erasing or programming commands. The AT91SAM7X512 contains 32
lock regions and each lock region contains 64 pages of 256 bytes. Each lock region has a size of
16 Kbytes.
If a locked-region’s erase or program command occurs, the command is aborted and the EFC
trigs an interrupt.
The 32 NVM bits are software programmable through both of the EFC User Interfaces. The com-
mand “Set Lock Bit” enables the protection. The command “Clear Lock Bit” unlocks the lock
region.
Asserting the ERASE pin clears the lock bits, thus unlocking the entire Flash.
The Embedded Flash Controller manages 16 lock bits to protect 16 regions of the flash against
inadvertent flash erasing or programming commands. The AT91SAM7X256 contains 16 lock
regions and each lock region contains 64 pages of 256 bytes. Each lock region has a size of 16
Kbytes.
If a locked-region’s erase or program command occurs, the command is aborted and the EFC
trigs an interrupt.
The 16 NVM bits are software programmable through the EFC User Interface. The command
“Set Lock Bit” enables the protection. The command “Clear Lock Bit” unlocks the lock region.
Asserting the ERASE pin clears the lock bits, thus unlocking the entire Flash.
The Embedded Flash Controller manages 8 lock bits to protect 8 regions of the flash against
inadvertent flash erasing or programming commands. The AT91SAM7X128 contains 8 lock
regions and each lock region contains 64 pages of 256 bytes. Each lock region has a size of 16
Kbytes.
If a locked-region’s erase or program command occurs, the command is aborted and the EFC
trigs an interrupt.
The 8 NVM bits are software programmable through the EFC User Interface. The command “Set
Lock Bit” enables the protection. The command “Clear Lock Bit” unlocks the lock region.
Asserting the ERASE pin clears the lock bits, thus unlocking the entire Flash.
The AT91SAM7X512/256/128 features a security bit, based on a specific NVM-Bit. When the
security is enabled, any access to the Flash, either through the ICE interface or through the Fast
AT91SAM7X512/256/128 Preliminary Summary
21