PIC17LC756A-08I/L Microchip Technology, PIC17LC756A-08I/L Datasheet - Page 230

• Manufacturer Part Number: PIC17LC756A-08I/L
• Description: IC MCU OTP 16KX16 A/D 68PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17LC756A-08I/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 902 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• Processor Series: PIC17LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 902 B
• Interface Type: I2C, MSSP, RS- 232, SCI, SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 8
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC17C7XX
TLWT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
DS30289B-page 230
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
t
RAM
TBLAT
RAM
TBLAT
t
RAM
TBLAT
RAM
TBLAT
Q1
=
=
=
=
=
=
=
=
=
=
register ’f’
Table Latch Write
[ label ] TLWT t,f
0
t
If t = 0,
f
If t = 1,
f
None
Data from file register ’f’ is written into
the 16-bit table latch (TBLAT).
If t = 1; high byte is written
If t = 0; low byte is written
This instruction is used in conjunction
with TABLWT to transfer data from data
memory to program memory.
1
1
TLWT
Read
1010
Q2
0
0xB7
0x0000
0xB7
0x00B7
1
0xB7
0x0000
0xB7
0xB700
[0,1]
f
TBLATL;
TBLATH
255
t, RAM
01tx
(TBLATH = 0x00)
(TBLATL = 0x00)
(TBLATL = 0xB7)
(TBLATH = 0x00)
(TBLATL = 0x00)
(TBLATL = 0x00)
(TBLATH = 0x00)
(TBLATH = 0xB7)
Process
Data
Q3
ffff
TBLATH or
TBLATL
register
Write
Q4
ffff
TSTFSZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
If skip:
Example:
Before Instruction
After Instruction
operation
Decode
PC = Address (HERE)
If CNT
If CNT
Q1
Q1
No
PC
PC
register ’f’
operation
Test f, skip if 0
[ label ] TSTFSZ f
0
skip if f = 0
None
If ’f’ = 0, the next instruction, fetched
during the current instruction execution,
is discarded and a NOP is executed,
making this a two-cycle instruction.
1
1 (2)
HERE
NZERO
ZERO
Read
0011
Q2
Q2
No
=
=
¼
=
f
2000 Microchip Technology Inc.
255
0x00,
Address (ZERO)
0x00,
Address (NZERO)
TSTFSZ
:
:
0011
operation
Process
Data
Q3
Q3
No
CNT
ffff
operation
operation
Q4
Q4
No
No
ffff