P87C51RC2BN,112 NXP Semiconductors, P87C51RC2BN,112 Datasheet - Page 56

IC 80C51 MCU 512 RAM 40DIP

P87C51RC2BN,112

Manufacturer Part Number
P87C51RC2BN,112
Description
IC 80C51 MCU 512 RAM 40DIP
Manufacturer
NXP Semiconductors
Series
87Cr
Datasheet

Specifications of P87C51RC2BN,112

Core Processor
8051
Core Size
8-Bit
Speed
33MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Cpu Family
87C
Device Core
80C51
Device Core Size
8b
Frequency (max)
33MHz
Interface Type
UART
Total Internal Ram Size
512Byte
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
40
Package Type
PDIP
Processor Series
P87C5x
Core
80C51
Data Bus Width
8 bit
Maximum Clock Frequency
16 MHz
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
0 C
For Use With
OM10064 - EMULATOR 80C51 PDS51-MK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant
Other names
935272150112
P87C51RC2BN
P87C51RC2BN
1. ‘0’ = Valid low for that pin, ‘1’ = valid high for that pin.
2. V
3. V
4. Bit is output on P0.4 (1 = 12x, 0 = 6x).
5. Security bit one is output on P0.7.
*
1. P – programmed. U – unprogrammed.
2. Any other combination of the security bits is not defined.
Philips Semiconductors
Table 8. EPROM Programming Modes
NOTES:
Table 9. Program Security Bits for EPROM Devices
NOTES:
2003 Jan 24
Read signature
Program code data
Verify code data
Pgm encryption table
Pgm security bit 1
Pgm security bit 2
Pgm security bit 3
Program to 6-clock mode
Verify 6-clock
Verify security bits
80C51 8-bit microcontroller family
with 512B/1KB RAM, low voltage (2.7 to 5.5 V), low power, high
speed (30/33 MHz)
Security bit two is output on P0.6.
Security bit three is output on P0.3.
ALE/PROG receives 5 programming pulses for code data (also for user array; 5 pulses for encryption or security bits) while V
12.75 V. Each programming pulse is low for 100 s ( 10 s) and high for a minimum of 10 s.
1
2
3
4
PP
CC
PROGRAM LOCK BITS
= 12.75 V 0.25 V.
= 5 V 10% during programming and verification.
SB1
MODE
U
P
P
P
4
5
SB2
U
U
P
P
1, 2
SB3
U
U
U
P
RST
1
1
1
1
1
1
1
1
1
1
PROTECTION DESCRIPTION
No Program Security features enabled. (Code verify will still be encrypted by the Encryption Array if
programmed.)
MOVC instructions executed from external program memory are disabled from fetching code bytes
from internal memory, EA is sampled and latched on Reset, and further programming of the EPROM
is disabled.
Same as 2, also verify is disabled.
Same as 3, external execution is disabled. Internal data RAM is not accessible.
8KB/16KB/32KB/64KB OTP
PSEN
0
0
0
0
0
0
0
0
0
0
ALE/PROG
0*
0*
0*
0*
0*
0*
1
1
1
1
56
EA/V
V
V
V
V
V
V
1
1
1
1
PP
PP
PP
PP
PP
PP
PP
P2.7
0
1
0
1
1
1
0
0
e
e
P87C51RA2/RB2/RC2/RD2
P2.6
0
0
0
0
1
1
1
0
0
0
P3.7
0
1
1
1
1
0
0
1
0
1
P3.6
0
1
1
0
1
0
1
0
1
0
PP
Product data
is held at
P3.3
X
X
X
X
X
X
X
X
0
1

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