Z8F0412SJ020SG Zilog, Z8F0412SJ020SG Datasheet - Page 194

IC ENCORE MCU FLASH 4K 28SOIC

Z8F0412SJ020SG

Manufacturer Part Number
Z8F0412SJ020SG
Description
IC ENCORE MCU FLASH 4K 28SOIC
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F0412SJ020SG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
Z8F041xx
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
19
Number Of Timers
2
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
269-4107
Z8F0412SJ020SG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F0412SJ020SG
Manufacturer:
ZILOG
Quantity:
20 000
On-Chip Debugger Control Register Definitions
PS022517-0508
OCD Control Register
The OCD Control Register controls the state of the OCD. This register enters or exits
DEBUG mode and enables the BRK instruction. It can also reset the Z8 Encore! XP
F0822 Series device.
Read Program Memory CRC (0EH)
computes and returns the CRC (cyclic redundancy check) of Program Memory using
the 16-bit CRC-CCITT polynomial. If the device is not in DEBUG mode, this
command returns
commands, there is a delay from issuing of the command until the OCD returns the
data. The OCD reads the Program Memory, calculates the CRC value, and returns the
result. The delay is a function of the Program Memory size and is approximately equal
to the system clock period multiplied by the number of bytes in the Program Memory.
Step Instruction (10H)
instruction at the current Program Counter location. If the device is not in DEBUG
mode or the Read Protect Option Bit is enabled, the OCD ignores this command.
Stuff Instruction (11H)
instruction and allows specification of the first byte of the instruction. The remaining
0-4 bytes of the instruction are read from Program Memory. This command is useful
for stepping over instructions where the first byte of the instruction has been
overwritten by a Breakpoint. If the device is not in DEBUG mode or the Read Protect
Option Bit is enabled, the OCD ignores this command.
Execute Instruction (12H)
entire instruction to be executed to the eZ8 CPU. This command can also step over
Breakpoints. The number of bytes to send for the instruction depends on the opcode. If
the device is not in DEBUG mode or the Read Protect Option Bit is enabled, the OCD
ignores this command
DBG ← Size[7:0]
DBG → 1-65536 data bytes
DBG ← 0EH
DBG → CRC[15:8]
DBG → CRC[7:0]
DBG ← 10H
DBG ← 11H
DBG ← opcode[7:0]
DBG ← 12H
DBG ← 1-5 byte opcode
FFFFH
—The Step Instruction command steps one assembly
—The Stuff Instruction command steps one assembly
for the CRC value. Unlike most other OCD Read
—The Execute Instruction command allows sending an
—The Read Program Memory CRC command
Z8 Encore! XP
Product Specification
®
On-Chip Debugger
F0822 Series
®
181

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