STM32F101C8U6 STMicroelectronics, STM32F101C8U6 Datasheet - Page 13

• Manufacturer Part Number: STM32F101C8U6
• Description: MCU 32BIT ARM 128K FLASH 48-QFN
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32F101C8U6

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 36MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
• Number Of I /o: 37
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP Exposed Pad, 48-eLQFP, 48-HLQFP
• Processor Series: STM32F101x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 10 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 36 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 10 Channel
• Featured Product: STM32 Cortex-M3 Companion Products
• Eeprom Size: -
• For Use With: 497-10030 - STARTER KIT FOR STM32497-6438 - BOARD EVALUTION FOR STM32 512K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

STM32F101x8, STM32F101xB
Figure 2.
1. When the HSI is used as a PLL clock input, the maximum system clock frequency that can be achieved is
2. To have an ADC conversion time of 1 µs, APB2 must be at 14 MHz or 28 MHz.
OSC32_OUT
36 MHz.
OSC32_IN
OSC_OUT
OSC_IN
MCO
Clock tree
4-16 MHz
32.768 kHz
Main
Clock Output
HSE OSC
LSE OSC
HSI RC
8 MHz
LSI RC
40 kHz
PLLSRC
MCO
x2, x3, x4
PLLMUL
HSI
..., x16
PLLXTPRE
PLL
/2
/128
LSE
/2
LSI
RTCSEL[1:0]
/2
Doc ID 13586 Rev 14
HSE
SYSCLK
PLLCLK
HSI
PLLCLK
RTCCLK
to Independent Watchdog (IWDG)
HSI
HSE
CSS
SW
SYSCLK
36 MHz
max
to RTC
IWDGCLK
Prescaler
/1, 2..512
AHB
FLITFCLK
to Flash programming interface
/1, 2, 4, 8, 16
/1, 2, 4, 8, 16
TIM2,3, 4
If (APB1 prescaler =1) x1
else
36 MHz max
/8
Prescaler
Prescaler
APB2
APB1
Clock
Enable (3 bits)
Legend:
HSE = high-speed external clock signal
HSI = high-speed internal clock signal
LSI = low-speed internal clock signal
LSE = low-speed external clock signal
36 MHz max
36 MHz max
Peripheral Clock
Prescaler
/2, 4, 6, 8
Peripheral Clock
Enable (13 bits)
Enable (11 bits)
ADC
x2
HCLK
to AHB bus, core,
memory and DMA
FCLK Cortex
free running clock
to Cortex System timer
Peripheral Clock
Enable (3 bits)
Description
ADCCLK
TIMXCLK
PCLK1
PCLK2
to APB1
peripherals
to APB2
peripherals
to TIM2, 3
and 4
ai15104
to ADC
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