ST10R172LT1 STMicroelectronics, ST10R172LT1 Datasheet - Page 6

• Manufacturer Part Number: ST10R172LT1
• Description: MCU 16BIT ROMLESS LV 100TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10R172LT1

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, SSP, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 77
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-TQFP, 100-VQFP
• Controller Family/series: ST10
• No. Of I/o's: 77
• Ram Memory Size: 1KB
• Cpu Speed: 50MHz
• No. Of Timers: 5
• Embedded Interface Type: SPI, USART
• No. Of Pwm Channels: 1
• Rohs Compliant: Yes
• Processor Series: ST10R1x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Interface Type: SSP, USART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 77
• Number Of Timers: 5
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: In Transition

ST10R172L - PIN DESCRIPTION
6/68
1
P3.0 –
P3.13
P3.15
8-21
22
9
10
11
12
13
14
15
18
19
20
22
I/O
I/O
O
I
O
I
I
I
I
O
I/O
O
O
O
5T
5T
5T
5T
5T
5T
5T
5T
5T
5T
5T
5T
5T
5T
Table 1 Pin definitions
A 15-bit (P3.14 is missing) bidirectional I/O port. Port 3 is bit-
wise programmable for input or output via direction bits. For a
pin configured as input, the output driver is put into high-
impedance state. Port 3 outputs can be configured as push/
pull or open drain drivers. The following pins have alternate
functions:
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
P3.10
P3.11
P3.12
P3.15
T6OUT
CAPIN
T3OUT
T3EUD
T4IN
T3IN
T2IN
TxD0
RxD0
BHE
WRH
CLKOUT
GPT2 Timer T6 toggle latch output
input
GPT1 Timer T3 toggle latch output
GPT1 Timer T3 ext.up/down ctrl.input
GPT1 Timer T4 input for count/gate/
reload/capture
GPT1 Timer T3 count/gate input
GPT1 Timer T2 input for count/gate/
reload/capture
ASC0 clock/data output (asyn./syn.)
ASC0 data input (asyn.) or I/O (syn.)
Ext. Memory High Byte Enable Signal
Ext. Memory High Byte Write Strobe
GPT2 Register CAPREL capture
System clock output (=CPU clock)