ST10F269-DPB STMicroelectronics, ST10F269-DPB Datasheet - Page 153
ST10F269-DPB
Manufacturer Part Number
ST10F269-DPB
Description
MCU 16BIT 256K FLASH 144PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet
1.ST10F269DTR3.pdf
(160 pages)
Specifications of ST10F269-DPB
Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
144-BFQFP
Processor Series
ST10F26x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST10F269-DPB
Manufacturer:
STMicroelectronics
Quantity:
10 000
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21.4.12 - CLKOUT and READY
V
Table 37 : CLKOUT and READY Characteristics
Notes: 1. These timings are given for test purposes only, in order to assure recognition at a specific clock edge.
t
t
t
t
t
t
t
t
t
t
t
t
29
30
31
32
33
34
35
36
37
58
59
60
DD
Symbol
= 5V
2. Demultiplexed bus is the worst case. For multiplexed bus 2TCL are to be added to the maximum values. This adds even more time
for deactivating READY.
The 2t
CC
CC
CC
CC
CC
CC
SR
SR
SR
SR
SR
SR
A
and t
10%, V
CLKOUT cycle time
CLKOUT high time
CLKOUT low time
CLKOUT rise time
CLKOUT fall time
CLKOUT rising edge to
ALE falling edge
Synchronous READY
setup time to CLKOUT
Synchronous READY
hold time after CLKOUT
Asynchronous READY
low time
Asynchronous READY
setup time
Asynchronous READY
hold time
Async. READY hold time after
RD, WR high (Demultiplexed
Bus)
C
refer to the next following bus cycle, t
SS
Parameter
= 0V, T
A
= -40 to + 125°C, C
1)
1)
2)
Minimum
-2 + t
Maximum CPU Clock
12.5
12.5
F
25
35
refers to the current bus cycle.
4
3
–
–
2
2
0
A
= 40 MHz
L
= 50pF
0 + 2t
Maximum
8 + t
A
25
2)
–
–
4
4
–
–
–
–
–
+ t C + t
A
F
2TCL + 10
Minimum
TCL – 8.5
TCL – 9.5
-2 + t
2TCL
1/2TCL = 1 to 40 MHz
12.5
12.5
Variable CPU Clock
–
–
2
2
0
A
+ 2t
TCL - 12.5
Maximum
A
8 + t
2TCL
+ t C + t
–
–
4
4
–
–
–
–
–
A
ST10F269
F
2)
153/160
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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