ST10F269-DPB STMicroelectronics, ST10F269-DPB Datasheet - Page 57

• Manufacturer Part Number: ST10F269-DPB
• Description: MCU 16BIT 256K FLASH 144PQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F269-DPB

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 144-BFQFP
• Processor Series: ST10F26x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

12.2 - I/O’s Special Features
12.2.1 - Open Drain Mode
Some of the I/O ports of ST10F269 support the
open drain capability. This programmable feature
may be used with an external pull-up resistor, in
order to get an AND wired logical function.
This feature is implemented for ports P2, P3, P4,
P6, P7 and P8 (see respective sections), and is
controlled through the respective Open Drain
Control Registers ODPx. These registers allow
the individual bit-wise selection of the open drain
mode for each port line. If the respective control
bit ODPx.y is ‘0’ (default after reset), the output
driver is in the push-pull mode. If ODPx.y is ‘1’, the
open drain configuration is selected. Note that all
ODPx registers are located in the ESFR space
(See Figure 19).
PICON (F1C4h / E2h)
Figure 19 : Output Drivers in Push-pull Mode and in Open Drain Mode
PxLIN
PxHIN
15
-
Bit
14
-
13
-
Port x Low Byte Input Level Selection
0:
1:
Port x High Byte Input Level Selection
0:
1:
Q
Push-Pull Output Driver
12
-
Pins Px.7...Px.0 switch on standard TTL input levels
Pins Px.7...Px.0 switch on special threshold input levels
Pins Px.15...Px.8 switch on standard TTL input levels
Pins Px.15...Px.8 switch on special threshold input levels
11
-
10
-
Pin
9
-
8
-
ESFR
P8LIN P7LIN
RW
12.2.2 - Input Threshold Control
The standard inputs of the ST10F269 determine
the status of input signals according to TTL levels.
In order to accept and recognize noisy signals,
CMOS-like input thresholds can be selected
instead of the standard TTL thresholds for all pins
of Port 2, Port 3, Port 4, Port 7 and Port 8. These
special thresholds are defined above the TTL
thresholds and feature a defined hysteresis to
prevent the inputs from toggling while the
respective input signal level is near the thresholds.
The Port Input Control register PICON is used to
select these thresholds for each Byte of the
indicated ports, this means the 8-bit ports P4, P7
and P8 are controlled by one bit each while ports
P2 and P3 are controlled by two bits each.
All options for individual direction and output mode
control are available for each pin, independent of
the selected input threshold. The input hysteresis
provides stable inputs from noisy or slowly
changing external signals (See Figure 20).
7
Q
Function
Open Drain Output Driver
RW
6
5
-
External
Pullup
P4LIN P3HIN P3LIN P2HIN P2LIN
RW
Pin
4
RW
3
Reset Value: --00h
RW
2
ST10F269
RW
1
57/160
RW
0