MC9S08RD32CDWE Freescale Semiconductor, MC9S08RD32CDWE Datasheet - Page 109

• Manufacturer Part Number: MC9S08RD32CDWE
• Description: IC MCU 32K FLASH 2K RAM 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08RD32CDWE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: S08RD
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08RG60E
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

8.5
The CMT module consists of a carrier generator, a modulator, a transmitter output, and control registers.
The block diagram is shown in
the high and low times of the carrier signal to determine both period and duty cycle. The carrier generator
resolution is 125 ns when operating with an 8 MHz internal bus frequency and the CMTDIV1 and
CMTDIV0 bits in the CMTMSC register are both equal to 0. The carrier generator can generate signals
with periods between 250 ns (4 MHz) and 127.5 µs (7.84 kHz) in steps of 125 ns. See
The possible duty cycle options will depend upon the number of counts required to complete the carrier
period. For example, a 1.6 MHz signal has a period of 625 ns and will therefore require 5 × 125 ns counts
to generate. These counts may be split between high and low times, so the duty cycles available will be
20 percent (one high, four low), 40 percent (two high, three low), 60 percent (three high, two low) and
80 percent (four high, one low).
For lower frequency signals with larger periods, higher resolution (as a percentage of the total period) duty
cycles are possible.
When the BASE bit in the CMT modulator status and control register (CMTMSC) is set, the carrier output
(f
A third mode allows the carrier generator to alternate between two sets of high and low times. When
operating in FSK mode, the generator will toggle between the two sets when instructed by the modulator,
allowing the user to dynamically switch between two carrier frequencies without CPU intervention.
The modulator provides a simple method to control protocol timing. The modulator has a minimum
resolution of 1.0 µs with an 8 MHz internal bus clock. It can count bus clocks (to provide real-time control)
or it can count carrier clocks (for self-clocked protocols). See
The transmitter output block controls the state of the infrared out pin (IRO). The modulator output is gated
on to the IRO pin when the modulator/carrier generator is enabled.
A summary of the possible modes is shown in
Freescale Semiconductor
CG
) to the modulator is held high continuously to allow for the generation of baseband protocols.
Functional Description
Clock
(MHz)
Bus
8
8
8
8
CMTDIV1:CMTDIV0
Figure
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
0:0
0:1
1:0
1:1
8-2. When operating in time mode, the user independently defines
Table 8-1. Clock Divide
Table
Resolution
Generator
Carrier
0.125
(µs)
8-2.
0.25
0.5
1.0
Section 8.5.2,
Carrier Modulator Transmitter (CMT) Block Description
Min Carrier
Generator
Period
(µs)
0.25
0.5
1.0
2.0
“Modulator,"
Modulator
Period
(µs)
Min
1.0
2.0
4.0
8.0
Table
for more details.
8-1.
109