MC908AP32ACFAE Freescale Semiconductor, MC908AP32ACFAE Datasheet - Page 127

• Manufacturer Part Number: MC908AP32ACFAE
• Description: IC MCU 32K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AP32ACFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SCI, SPI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Processor Series: HC08AP
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908AP64E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

8.5.1 PRGRNGE
PRGRNGE is used to program a range of FLASH locations with data loaded into the data array.
The start location of the FLASH to be programmed is specified by the address ADDRH:ADDRL and the
number of bytes from this location is specified by DATASIZE. The maximum number of bytes that can be
programmed in one routine call is 255 bytes (max. DATASIZE is 255).
ADDRH:ADDRL do not need to be at a page boundary, the routine handles any boundary misalignment
during programming. A check to see that all bytes in the specified range are erased is not performed by
this routine prior programming. Nor does this routine do a verification after programming, so there is no
return confirmation that programming was successful. User must assure that the range specified is first
erased.
The coding example below is to program 64 bytes of data starting at FLASH location $EE00, with a bus
speed of 4.9152 MHz. The coding assumes the data block is already loaded in RAM, with the address
pointer, FILE_PTR, pointing to the first byte of the data block.
Freescale Semiconductor
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Bus speed — This one byte indicates the operating bus speed of the MCU. The value of this byte
should be equal to 4 times the bus speed. E.g., for a 4MHz bus, the value is 16 ($10). This control
byte is useful where the MCU clock source is switched between the PLL clock and the crystal clock.
Data size — This one byte indicates the number of bytes in the data array that are to be
manipulated. The maximum data array size is 255. ERARNGE and MON_ERARNGE routines do
not manipulate a data array, thus, this data size byte has no meaning.
Start address — These two bytes, high byte followed by low byte, indicate the start address of the
FLASH memory to be manipulated.
Data array — This data array contains data that are to be manipulated. Data in this array are
programmed to FLASH memory by the programming routines, PRGRNGE and MON_PRGRNGE.
For the read routine, LDRNGE, data is read from FLASH and stored in this array.
Routine Description
Data Block Format
Calling Address
Routine Name
Stack Used
MC68HC908AP A-Family Data Sheet, Rev. 3
Table 8-11. PRGRNGE Routine
PRGRNGE
Program a range of locations
$FC34
15 bytes
Bus speed (BUS_SPD)
Data size (DATASIZE)
Start address high (ADDRH)
Start address (ADDRL)
Data 1 (DATA1)
Data N (DATAN)
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ROM-Resident Routines
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