MC908AP32ACFAE Freescale Semiconductor, MC908AP32ACFAE Datasheet - Page 251

• Manufacturer Part Number: MC908AP32ACFAE
• Description: IC MCU 32K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AP32ACFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SCI, SPI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Processor Series: HC08AP
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908AP64E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

15.7 I/O Registers
These I/O registers control and monitor ADC operation:
15.7.1 ADC Status and Control Register
Function of the ADC status and control register is described here.
COCO — Conversions Complete Bit
AIEN — ADC Interrupt Enable Bit
ADCO — ADC Continuous Conversion Bit
ADCH[4:0] — ADC Channel Select Bits
Freescale Semiconductor
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In non-interrupt mode (AIEN = 0), COCO is a read-only bit that is set at the end of each conversion.
COCO will stay set until cleared by a read of the ADC data register. Reset clears this bit.
In interrupt mode (AIEN = 1), COCO is a read-only bit that is not set at the end of a conversion. It
always reads as a 0.
When this bit is set, an interrupt is generated at the end of an ADC conversion. The interrupt signal is
cleared when the data register, ADR0, is read or the ADSCR is written. Reset clears the AIEN bit.
When set, the ADC will convert samples continuously and update the ADC data register at the end of
each conversion. Only one conversion is allowed when this bit is cleared. Reset clears the ADCO bit.
This bit should not be set when auto-scan mode is enabled; i.e. when ASCAN=1.
ADCH[4:0] form a 5-bit field which is used to select one of the ADC channels when not in auto-scan
mode. The five channel select bits are detailed in
1 = Conversion completed (AIEN = 0)
0 = Conversion not completed (AIEN = 0) or CPU interrupt enabled (AIEN = 1)
1 = ADC interrupt enabled
0 = ADC interrupt disabled
1 = Continuous ADC conversion
0 = One ADC conversion
ADC status and control register (ADSCR) — $0057
ADC clock control register (ADICLK) — $0058
ADC data register high:low 0 (ADRH0:ADRL0) — $0059:$005A
ADC data register low 1–3 (ADRL1–ADRL3) — $005B–$005D
ADC auto-scan control register (ADASCR) — $005E
Address:
The write function of the COCO bit is reserved. When writing to the ADSCR
register, always have a 0 in the COCO bit position.
Care should be taken when using a port pin as both an analog and a digital
input simultaneously to prevent switching noise from corrupting the analog
Reset:
Read:
Write:
Figure 15-3. ADC Status and Control Register (ADSCR)
COCO
$0057
0
AIEN
MC68HC908AP A-Family Data Sheet, Rev. 3
0
ADCO
0
NOTE
NOTE
ADCH4
1
Table
ADCH3
15-1.
1
ADCH2
1
ADCH1
1
ADCH0
1
I/O Registers
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