MC9S08GB60ACFUE Freescale Semiconductor, MC9S08GB60ACFUE Datasheet - Page 238

IC MCU 60K FLASH 4K RAM 64-LQFP

MC9S08GB60ACFUE

Manufacturer Part Number
MC9S08GB60ACFUE
Description
IC MCU 60K FLASH 4K RAM 64-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08GB60ACFUE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
56
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
S08GB
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
8
Operating Supply Voltage
0 V to 1.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
M68EVB908GB60E, M68DEMO908GB60E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Analog-to-Digital Converter (S08ATDV3)
For right-justified mode, result data bits 9 and 8 map onto bits 1 and 0 of ATD1RH, result data bits 7–0
map onto ATD1RL bits 7–0, where bit 1 of ATD1RH is the most significant bit (MSB).
The ATD 10-bit conversion results are stored in two 8-bit result registers, ATD1RH and ATD1RL. The
result data is formatted either left or right justified where the format is selected using the DJM control bit
in the ATD1C register. The 10-bit result data is mapped either between ATD1RH bits 7–0 and ATD1RL
bits 7–6 (left justified), or ATD1RH bits 1–0 and ATD1RL bits 7–0 (right justified).
For 8-bit conversions, the 8-bit result is always located in ATD1RH bits 7–0, and the ATD1RL bits read
0. For 10-bit conversions, the six unused bits always read 0.
The ATD1RH and ATD1RL registers are read-only.
14.6.4
The ATD pin enable register allows the pins dedicated to the ATD module to be configured for ATD usage.
A write to this register will abort the current conversion but will not initiate a new conversion. If the
ATDPEx bit is 0 (disabled for ATD usage) but the corresponding analog input channel is selected via the
ATDCH bits, the ATD will not convert the analog input but will instead convert V
the ATD result registers.
238
ATDPE[7:0]
Reset
ATD1RH
ATD1RH
Field
7
9
7
7
W
R
ATDPE7
ATD Pin Enable (ATD1PE)
6
6
ATD Pin 7–0 Enables
0 Pin disabled for ATD usage.
1 Pin enabled for ATD usage.
0
7
5
5
ATDPE6
4
4
0
6
Figure 14-9. ATD Pin Enable Register (ATD1PE)
3
3
RESULT
Table 14-8. ATD1PE Field Descriptions
ATDPE5
2
2
Figure 14-8. Right-Justified Mode
Figure 14-7. Left-Justified Mode
MC9S08GB60A Data Sheet, Rev. 2
0
5
1
1
9
ATDPE4
0
0
0
4
Description
ATD1RL
ATD1RL
7
7
ATDPE3
3
0
6
0
6
RESULT
5
5
ATDPE2
4
4
0
2
3
3
REFL
ATDPE1
Freescale Semiconductor
2
2
0
1
placing zeroes in
1
1
ATDPE0
0
0
0
0
0

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