C8051F016-GQR Silicon Laboratories Inc, C8051F016-GQR Datasheet - Page 121

• Manufacturer Part Number: C8051F016-GQR
• Description: IC 8051 MCU 32K FLASH 48TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F01xr

Specifications of C8051F016-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TQFP, 48-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

16.6.5. Status Register
The SMB0STA Status register holds an 8-bit status code indicating the current state of the SMBus. There are 28
possible SMBus states, each with a corresponding unique status code. The five most significant bits of the status
code vary while the three least-significant bits of a valid status code are fixed at zero when SI = 1. Therefore, all
possible status codes are multiples of eight. This facilitates the use of status codes in software as an index used to
branch to appropriate service routines (allowing 8 bytes of code to service the state or jump to a more extensive
service routine).
For the purposes of user software, the contents of the SMB0STA register is only defined when the SI flag is logic 1.
Software should never write to the SMB0STA register. Doing so will yield indeterminate results. The 28 SMBus
states, along with their corresponding status codes, are given in Table 16.1.
121
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
Bits7-3: STA7-STA3: SMBus Status Code.
Bits2-0: STA2-STA0: The three least significant bits of SMB0STA are always read as logic 0 when
STA7
R/W
Bit7
These bits contain the SMBus Status Code. There are 28 possible status codes. Each
status code corresponds to a single SMBus state. A valid status code is present in
SMB0STA when the SI flag (SMB0CN.3) is set. The content of SMB0STA is not defined
when the SI flag is logic 0. Writing to the SMB0STA register at any time will yield
indeterminate results.
the SI flag is logic 1.
STA6
R/W
Bit6
Figure 16.8. SMB0STA: SMBus Status Register
STA5
R/W
Bit5
STA4
R/W
Bit4
Rev. 1.7
STA3
R/W
Bit3
STA2
R/W
Bit2
STA1
R/W
Bit1
STA0
R/W
Bit0
SFR Address:
Reset Value
11111000
0xC1