IC M16C MCU FLASH 64K 100-QFP

M30622F8PFP#D5C

Manufacturer Part NumberM30622F8PFP#D5C
DescriptionIC M16C MCU FLASH 64K 100-QFP
ManufacturerRenesas Electronics America
SeriesM16C™ M16C/60
M30622F8PFP#D5C datasheet
 

Specifications of M30622F8PFP#D5C

Core ProcessorM16C/60Core Size16-Bit
Speed24MHzConnectivityI²C, IEBus, UART/USART
PeripheralsDMA, WDTNumber Of I /o85
Program Memory Size64KB (64K x 8)Program Memory TypeFLASH
Ram Size4K x 8Voltage - Supply (vcc/vdd)2.7 V ~ 5.5 V
Data ConvertersA/D 26x10b; D/A 2x8bOscillator TypeInternal
Operating Temperature-20°C ~ 85°CPackage / Case100-QFP
Lead Free Status / RoHS StatusContains lead / RoHS non-compliantEeprom Size-
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
Page 21
22
Page 22
23
Page 23
24
Page 24
25
Page 25
26
Page 26
27
Page 27
28
Page 28
29
Page 29
30
Page 30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
Page 27/103

Download datasheet (2Mb)Embed
PrevNext
M16C/62P Group (M16C/62P, M16C/62PT)
1.6
Pin Description
Table 1.17
Pin Description (100-pin and 128-pin Version) (1)
Signal Name
Pin Name
Power supply
VCC1,VCC2
input
VSS
Analog power
AVCC
supply input
AVSS
Reset input
RESET
CNVSS
CNVSS
External data
BYTE
bus width
select input
Bus control
D0 to D7
(4)
pins
D8 to D15
A0 to A19
A0/D0 to
A7/D7
A1/D0 to
A8/D7
CS0 to CS3
WRL/WR
WRH/BHE
RD
ALE
HOLD
HLDA
RDY
I : Input
O : Output
I/O : Input and output
Power Supply : Power supplies which relate to the external bus pins are separated as VCC2, thus they can be
interfaced using the different voltage as VCC1.
NOTES:
1. In this manual, hereafter, VCC refers to VCC1 unless otherwise noted.
2. In M16C/62PT, apply 4.0 to 5.5 V to the VCC1 and VCC2 pins. Also the apply condition is that VCC1 = VCC2.
3. When use VCC1 > VCC2, contacts due to some points or restrictions to be checked.
4. Bus control pins in M16C/62PT cannot be used.
Rev.2.41
Jan 10, 2006
Page 25 of 96
REJ03B0001-0241
I/O
Power
(3)
Type
Supply
I
Apply 2.7 to 5.5 V to the VCC1 and VCC2 pins and 0 V to the VSS
pin. The VCC apply condition is that VCC1 ≥ VCC2.
I
VCC1
Applies the power supply for the A/D converter. Connect the AVCC
pin to VCC1. Connect the AVSS pin to VSS.
I
VCC1
The microcomputer is in a reset state when applying “L” to the this pin.
I
VCC1
Switches processor mode. Connect this pin to VSS to when after
a reset to start up in single-chip mode. Connect this pin to VCC1 to
start up in microprocessor mode.
I
VCC1
Switches the data bus in external memory space. The data bus is
16 bits long when the this pin is held "L" and 8 bits long when the
this pin is held "H". Set it to either one. Connect this pin to VSS
when an single-chip mode.
I/O
VCC2
Inputs and outputs data (D0 to D7) when these pins are set as the
separate bus.
I/O
VCC2
Inputs and outputs data (D8 to D15) when external 16-bit data bus
is set as the separate bus.
O
VCC2
Output address bits (A0 to A19).
I/O
VCC2
Input and output data (D0 to D7) and output address bits (A0 to A7) by
timesharing when external 8-bit data bus are set as the multiplexed bus.
I/O
VCC2
Input and output data (D0 to D7) and output address bits (A1 to A8)
by timesharing when external 16-bit data bus are set as the
multiplexed bus.
O
VCC2
Output CS0 to CS3 signals. CS0 to CS3 are chip-select signals to
specify an external space.
O
VCC2
Output WRL, WRH, (WR, BHE), RD signals. WRL and WRH or
BHE and WR can be switched by program.
• WRL, WRH and RD are selected
The WRL signal becomes "L" by writing data to an even address in
an external memory space.
The WRH signal becomes "L" by writing data to an odd address in
an external memory space.
The RD pin signal becomes "L" by reading data in an external
memory space.
• WR, BHE and RD are selected
The WR signal becomes "L" by writing data in an external memory space.
The RD signal becomes "L" by reading data in an external memory space.
The BHE signal becomes "L" by accessing an odd address.
Select WR, BHE and RD for an external 8-bit data bus.
O
VCC2
ALE is a signal to latch the address.
I
VCC2
While the HOLD pin is held "L", the microcomputer is placed in a
hold state.
O
VCC2
In a hold state, HLDA outputs a "L" signal.
I
VCC2
While applying a "L" signal to the RDY pin, the microcomputer is
placed in a wait state.
1. Overview
Description
(1, 2)