HD6473308RCP10V Renesas Electronics America, HD6473308RCP10V Datasheet - Page 67

• Manufacturer Part Number: HD6473308RCP10V
• Description: MCU 5V 16K,PB-FREE 80-PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/330r

Specifications of HD6473308RCP10V

• Core Size: 8-Bit
• Program Memory Size: 16KB (16K x 8)
• Oscillator Type: Internal
• Core Processor: H8/300
• Speed: 10MHz
• Number Of I /o: 58
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-PLCC
• No. Of I/o's: 58
• Ram Memory Size: 512Byte
• Cpu Speed: 10MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 2
• Digital Ic Case: RoHS Compliant
• Controller Family/series: H8/330
• Peripherals: ADC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply (vcc/vdd): -
• Eeprom Size: -
• Data Converters: -
• Peripherals: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Notes on EEPMOV Instruction
1. The EEPMOV instruction is a block data transfer instruction. It moves the number of bytes
2. When setting R4L and R6, make sure that the final destination address (R6 + R4L) does not
3.6 CPU States
The CPU has three states: the program execution state, exception-handling state, and power-down
state. The power-down state is further divided into three modes: the sleep mode, software standby
mode, and hardware standby mode. Figure 3-11 summarizes these states, and figure 3-12 shows a
map of the state transitions.
State
specified by R4L from the address specified by R5 to the address specified by R6.
exceed H'FFFF. The value in R6 must not change from H'FFFF to H'0000 during execution of
the instruction.
R5
R5 + R4L
R5
R5 + R4L
Figure 3-10. Block Data Transfer Instruction/EEPROM Write Operation Code
15
Program execution state
Exception-handling state
Power-down state
The CPU executes successive program instructions.
A transient state triggered by a reset or interrupt. The CPU executes a hardware
sequence that includes loading the program counter from the vector table.
A state in which some or all of the chip
functions are stopped to conserve power.
Not allowed
H'FFFF
Figure 3-11. Operating States
8
Op
Op
7
51
R6
R6
R6 + R4L
R6 + R4L
Sleep mode
Software standby mode
Hardware standby mode
0
EEPROM
Notation
O P : Operation field