M30620FCAFP#U5 Renesas Electronics America, M30620FCAFP#U5 Datasheet - Page 60

• Manufacturer Part Number: M30620FCAFP#U5
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30620FCAFP#U5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Package: 100PQFP
• Family Name: M16C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 87
• Interface Type: SIM/UART
• On-chip Adc: 10-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 11
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Interrupt
Figure 1.11.7. Operation of saving registers
The operation of saving registers carried out in the interrupt sequence is dependent on whether the
content of the stack pointer (Note) , at the time of acceptance of an interrupt request, is even or odd. If
the content of the stack pointer (Note) is even, the content of the flag register (FLG) and the content of the
program counter (PC) are saved, 16 bits at a time. If odd, their contents are saved in two steps, 8 bits at
a time. Figure 1.11.7 shows the operation of the saving registers.
Note: When any INT instruction in software numbers 32 to 63 has been executed, this is the stack pointer
indicated by the U flag. Otherwise, it is the interrupt stack pointer (ISP).
(1) Stack pointer (SP) contains even number
[SP] – 5 (Odd)
[SP] – 4 (Even)
[SP] – 2 (Even)
[SP] – 5 (Even)
[SP] – 3 (Even)
[SP] – 1 (Even)
[SP] – 3(Odd)
[SP] – 1(Odd)
[SP]
(2) Stack pointer (SP) contains odd number
[SP] – 4(Odd)
[SP] – 2(Odd)
[SP]
Note: [SP] denotes the initial value of the stack pointer (SP) when interrupt request is acknowledged.
Address
Address
(Odd)
After registers are saved, the SP content is [SP] minus 4.
(Even)
Flag register
Flag register
Program counter (PC
Program counter (PC
Program counter (PC
Program counter (PC
(FLG
(FLG
Flag register (FLG
Flag register (FLG
Stack area
Stack area
H
H
)
)
counter (PC
counter (PC
Program
Program
L
L
)
)
M
M
L
L
)
)
)
)
H
H
)
)
Sequence in which order
registers are saved
Sequence in which order
registers are saved
Finished saving registers
in two operations.
(3)
(4)
(1)
(2)
(2) Saved simultaneously,
(1) Saved simultaneously,
Finished saving registers
in four operations.
all 16 bits
all 16 bits
Saved simultaneously,
all 8 bits
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
M16C / 62A Group
Mitsubishi microcomputers
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