M30624FGAFP#U3 Renesas Electronics America, M30624FGAFP#U3 Datasheet - Page 427

• Manufacturer Part Number: M30624FGAFP#U3
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30624FGAFP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

SI/O3, 4
2-108
Operation
Note
Figure 2.6.3. Operation timing of transmission in SI/O3, 4 mode
2.6.2 Operation of SI/O3,4
Example of operation
Example of wiring
In transmitting data in this mode, choose functions from those listed in Table 2.6.1. Operations of the
circled items are described below. Figure 2.6.3 shows the operation timing, and Figures 2.6.4 and 2.6.5
show the set-up procedures.
Internal clock
SI/Oi transmit/receive
register write signal
SI/Oi interrupt
request bit
SI/Oi output
S
SI/Oi input
S
CLKi
OUT
IN
i
i
(i = 3, 4)
(1) Transfer begins upon writing the SI/Oi transmit data.
(2) When S
(3) After the transfer is completed, S
• Do not write data to the SI/Oi transmit/receive register (i = 3, 4; addresses 0360
• Data can only be written to the SI/Oi transmit/receive register when the device is idle neither
Table 2.6.1. Choosed functions
Transfer clock
source
Transfer clock
during a transfer.
sending nor receiving data.
TCLK = 2(n + 1) / fi
The transmit data is sent out from the S
transfer clock.
going to a high-impedance state.
fi: frequency of BRGi count source (f
n: value set to SiBRG
"1"
"0"
Item
OUT
(1) Transmission enabled
finishes sending one byte of data, the interrupt request bit is set to 1.
1.5 T
Microcomputer
O
O
CLK (Max)
External clock (CLKi pin)
LSB first
MSB first
Internal clock (f
S
CLKi
D
OUT
0
i
Set-up
Cleared to “0” when interrupt request is accepted, or cleared by software
D
1
1
OUT
, f
1
8
/ f
, f
8
32
holds the last data for a 1/2 transfer clock period before
/ f
D
)
32
2
)
OUTi
T
CLK
D
S
set function
3
OUT
pin synchronously with falling edges of the
i initial value
Receiver side IC
Item
D
4
CLK
S
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
IN
(2) Transmission
D
5
is complete
O
D
6
Used
Not used
M16C / 62A Group
D
Mitsubishi microcomputers
7
Set-up
(3) High-
Hi-Z
impedance
16
, 0364
16
)