M30624FGAFP#U3 Renesas Electronics America, M30624FGAFP#U3 Datasheet - Page 494

IC M16C MCU FLASH 100QFP

M30624FGAFP#U3

Manufacturer Part Number
M30624FGAFP#U3
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets

Specifications of M30624FGAFP#U3

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Power Control
(3) Clearing stop mode and wait mode
(4) BCLK in returning from wait mode or stop mode
Table 2.15.1. Interrupts available for clearing stop mode and wait mode
The stop mode and wait mode can be cleared by generating an interrupt request, or by resetting
hardware. Set the priority level of the interrupt to be used for clearing, higher than the processor
interrupt priority level (IPL), set that of the interrupt to “0” not to be used for clearing, and enable the
interrupt enable flag (I flag). When an interrupt clears a mode, that interrupt is processed. Table
2.15.1 shows the interrupts that can be used for clearing a stop mode and wait mode.
(a) Returning from wait mode
(b) Returning from stop mode
The processor immediately returns to the BCLK, which was in use before entering wait mode.
CM06 is set to “1” when the device enters stop mode after selecting the main clock for BCLK. CM17,
CM16, and CM07 do not change state. In this case, when restored from stop mode, the device starts
operating in divided-by-8 mode.
When the device enters stop mode after selecting the subclock for BCLK, CM06, CM17, CM16, and
CM07 all do not change state. In this case, when restored from stop mode, the device starts operat-
ing in low-speed mode.
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Bus collision detection interrupt
DMA0 interrupt
DMA1 interrupt
Key input interrupt
A-D interrupt
UART0 transmit interrupt
UART0 receive interrupt
UART1 transmit interrupt
UART1 receive interrupt
UART2 transmit interrupt
UART2 receive interrupt
SI/O3 interrupt
SI/O4 interrupt
Timer A0 interrupt
Timer A1 interrupt
Timer A2 interrupt
Timer A3 interrupt
Timer A4 interrupt
Timer B0 interrupt
Timer B1 interrupt
Timer B2 interrupt
Timer B3 interrupt
Timer B4 interrupt
Timer B5 interrupt
INT0 interrupt
INT1 interrupt
INT2 interrupt
INT3 interrupt
INT4 interrupt
INT5 interrupt
NMI interrupt
Can be used when an external clock is selected (UART0, UART1).
Can be used when an external clock in clock synchronous serial I/O mode is selected (UART2).
Can be used when the external signal is being counted in event counter mode.
Can be used in one-shot mode and one-shot sweep mode.
Can be used when an external clock is selected.
Can be used when count source is f
When the MCU running in low-speed or low power dissipation mode, do not enter wait mode
with CM02 is set to
Interrupt for clearing
“1”.
Impossible
Impossible
C32
CM02 = 0
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Note 3
.
Wait mode
CM07 = 0, CM05 = 0
CM02 =1(Note 6),
Note 2, Note 5
Note 2, Note 5
Note 2, Note 5
Note 2, Note 5
Note 2, Note 5
Note 2, Note 5
Note 2, Note 5
Note 2, Note 5
Note 2, Note 5
Note 2, Note 5
Note 2, Note 5
Impossible
Impossible
Impossible
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Note 4
Note 4
M16C / 62A Group
Mitsubishi microcomputers
Impossible
Impossible
Impossible
Stop mode
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Possible
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Note 4
Note 4
Note 2
Note 2
Note 2
Note 2
Note 2
Note 2
Note 2
Note 2
Note 2
Note 2
Note 2
2-175

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