UPD78F9222CS-CAC-A Renesas Electronics America, UPD78F9222CS-CAC-A Datasheet - Page 288

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UPD78F9222CS-CAC-A

Manufacturer Part Number
UPD78F9222CS-CAC-A
Description
MCU 8BIT 4KB FLASH 20PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9222CS-CAC-A

Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
286
(5) Flash address pointers H and L (FLAPH and FLAPL)
These registers are used to specify the start address of the flash memory when the memory is erased, written,
or verified in the self programming mode.
FLAPH and FLAPL consist of counters, and they are incremented until the values match with those of
FLAPHC and FLAPLC when the programming command is not executed. When the programming command
is executed, therefore, set the value again.
These registers are set with a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation makes these registers undefined.
Note If any command other than those above is executed, command execution may immediately be
Address: FFA3H
Symbol
FLCMD
terminated, and bits 1 and 2 (WEPRERR and VCERR) of the flash status register (PFS) may be set
to 1.
Figure 18-13. Format of Flash Programming Command Register (FLCMD)
FLCMD2
7
0
0
0
0
1
1
Other than above
After reset: 00H
FLCMD1
6
1
1
0
0
0
0
CHAPTER 18 FLASH MEMORY
FLCMD0
Note
User’s Manual U16898EJ6V0UD
5
0
1
0
1
0
1
R/W
Setting prohibited
Internal verify 1
Internal verify 2
Block erase
Block blank check
Byte write
Command Name
4
0
3
0
This command is used to check if
data has been correctly written to the
flash memory. It is used to check
whether data has been written to an
entire block. If an error occurs, bit 1
(VCERR) or bit 2 (WEPRERR) of the
flash status register (PFS) is set to 1.
This command is used to check if
data has been correctly written to the
flash memory. It is used to check
whether data has been written to
multiple addresses in the same
block. If an error occurs, bit 1
(VCERR) or bit 2 (WEPRERR) of the
flash status register (PFS) is set to 1.
This command is used to erase
specified block. It is used both in the
on-board mode and self
programming mode.
This command is used to check if the
specified block has been erased.
This command is used to write 1-byte
data to the specified address in the
flash memory. Specify the write
address and write data, then execute
this command.
If 1 is written to a bit that has not
been erased (a bit for which the data
is 0), then bit 2 (WEPRERR) of the
flash status register (PFS) becomes
1.
FLCMD2
2
Function
FLCMD1
1
FLCMD0
0

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