UPD70F3735GC-GAD-AX Renesas Electronics America, UPD70F3735GC-GAD-AX Datasheet - Page 225

• Manufacturer Part Number: UPD70F3735GC-GAD-AX
• Description: MCU 32BIT V850ES/JX3-L 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3735GC-GAD-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 66
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 8x10b, D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JF3-L
R01UH0017EJ0400 Rev.4.00
Sep 30, 2010
TPnIOC2
(d) TMPn I/O control register 2 (TPnIOC2)
(e) TMPn counter read buffer register (TPnCNT)
(f) TMPn capture/compare registers 0 and 1 (TPnCCR0 and TPnCCR1)
The value of the 16-bit counter can be read by reading the TPnCNT register.
If D
waveform are as follows.
Remarks 1. TMPn I/O control register 1 (TPnIOC1) and TMPn option register 0 (TPnOPT0) are not used
Cycle = (D
Active level width = D
0
0
is set to the TPnCCR0 register and D
Figure 7-18. Setting of Registers in External Trigger Pulse Output Mode (2/2)
2. n = 0 to 2, 5
0
+ 1) × Count clock cycle
in the external trigger pulse output mode.
0
1
0
× Count clock cycle
0
TPnEES1
0/1
1
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
to the TPnCCR1 register, the cycle and active level of the PWM
TPnEES0 TPnETS1 TPnETS0
0/1
0/1
0/1
Select valid edge of
external trigger input
Select valid edge of
external event count input
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