UPD70F3735GC-GAD-AX Renesas Electronics America, UPD70F3735GC-GAD-AX Datasheet - Page 631

• Manufacturer Part Number: UPD70F3735GC-GAD-AX
• Description: MCU 32BIT V850ES/JX3-L 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3735GC-GAD-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 66
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 8x10b, D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JF3-L
R01UH0017EJ0400 Rev.4.00
Sep 30, 2010
Reset
Non-
maskable
Software
exception
Exception
trap
Maskable
Type
Notes 1. For the restoring in the case of INTWDT2, see 19.2.2 (2) From INTWDT2 signal.
Interrupt
Interrupt
Exception
Exception
Interrupt
2. n = 0 to FH
Classification
Default
Priority
10
11
12
13
14
15
16
17
18
19
20
21
22
−
−
−
−
−
−
0
1
2
3
4
5
6
7
8
9
RESET
NMI
INTWDT2
TRAP0n
TRAP1n
ILGOP/
DBG0
INTLVI
INTP0
INTP1
INTP2
INTP3
INTP4
INTP5
INTP6
INTP7
INTTQ0OV
INTTQ0CC0 TMQ0 capture 0/compare 0 match TMQ0
INTTQ0CC1
INTTQ0CC2
INTTQ0CC3
INTTP0OV
INTTP0CC0 TMP0 capture 0/compare 0 match
INTTP0CC1 TMP0 capture 1/compare 1 match
INTTP1OV
INTTP1CC0
INTTP1CC1
INTTP2OV
INTTP2CC0
INTTP2CC1
Name
Note 2
Note 2
RESET pin input
Reset input by internal source
NMI pin valid edge input
WDT2 overflow
TRAP instruction
TRAP instruction
Illegal opcode/
DBTRAP instruction
Low voltage detection
External interrupt pin input edge
detection (INTP0)
External interrupt pin input edge
detection (INTP1)
External interrupt pin input edge
detection (INTP2)
External interrupt pin input edge
detection (INTP3)
External interrupt pin input edge
detection (INTP4)
External interrupt pin input edge
detection (INTP5)
External interrupt pin input edge
detection (INTP6)
External interrupt pin input edge
detection (INTP7)
TMQ0 overflow
TMQ0 capture 1/compare 1 match TMQ0
TMQ0 capture 2/compare 2 match TMQ0
TMQ0 capture 3/compare 3 match TMQ0
TMP0 overflow
TMP1 overflow
TMP1 capture 0/compare 0 match
TMP1 capture 1/compare 1 match
TMP2 overflow
TMP2 capture 0/compare 0 match
TMP2 capture 1/compare 1 match
Table 19-1. Interrupt Source List (1/3)
CHAPTER 19 INTERRUPT/EXCEPTION PROCESSING FUNCTION
Trigger
RESET
Pin
WDT2
POCLVI
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
TMQ0
TMP0
TMP0
TMP0
TMP1
TMP1
TMP1
TMP2
TMP2
TMP2
Generating
Unit
−
−
−
0000H
0010H
0020H
004nH
005nH
0060H
0080H
0090H
00A0H
00B0H
00C0H
00D0H
00E0H
00F0H
0100H
0110H
0120H
0130H
0140H
0150H
0160H
0170H
0180H
0190H
01A0H
01B0H
01C0H
01D0H
01E0H
Exception
Code
Note 2
Note 2
00000040H nextPC
00000050H nextPC
00000060H nextPC
00000000H Undefined
00000010H nextPC
00000020H Note 1
00000080H nextPC
00000090H nextPC
000000A0H nextPC
000000B0H nextPC
000000C0H nextPC
000000D0H nextPC
000000E0H nextPC
000000F0H nextPC
00000100H nextPC
00000110H nextPC
00000120H nextPC
00000130H nextPC
00000140H nextPC
00000150H nextPC
00000160H nextPC
00000170H nextPC
00000180H nextPC
00000190H nextPC
000001A0H nextPC
000001B0H nextPC
000001C0H nextPC
000001D0H nextPC
000001E0H nextPC
Address
Handler
Restored
PC
Page 615 of 816
LVIIC
PIC0
PIC1
PIC2
PIC3
PIC4
PIC5
PIC6
PIC7
TQ0OVIC
TQ0CCIC0
TQ0CCIC1
TQ0CCIC2
TQ0CCIC3
TP0OVIC
TP0CCIC0
TP0CCIC1
TP1OVIC
TP1CCIC0
TP1CCIC1
TP2OVIC
TP2CCIC0
TP2CCIC1
Interrupt
Register
Control
−
−
−
−
−
−