UPD70F3735GC-GAD-AX Renesas Electronics America, UPD70F3735GC-GAD-AX Datasheet - Page 424

• Manufacturer Part Number: UPD70F3735GC-GAD-AX
• Description: MCU 32BIT V850ES/JX3-L 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3735GC-GAD-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 66
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 8x10b, D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JF3-L
13.5.4 Operation mode
continuous scan mode, one-shot select mode, and one-shot scan mode.
R01UH0017EJ0400 Rev.4.00
Sep 30, 2010
Four operation modes are available as the modes in which to set the ANI0 to ANI7 pins: continuous select mode,
The operation mode is selected by the ADA0M0.ADA0MD1 and ADA0M0.ADA0MD0 bits.
(1) Continuous select mode
(2) Continuous scan mode
A/D conversion
In this mode, the voltage of one analog input pin selected by the ADA0S register is continuously converted into a
digital value.
The conversion result is stored in the ADA0CRn register corresponding to the analog input pin. In this mode, an
analog input pin corresponds to an ADA0CRn register on a one-to-one basis. Each time A/D conversion is
completed, the A/D conversion end interrupt request signal (INTAD) is generated. After completion of conversion,
the next conversion is started, unless the ADA0M0.ADA0CE bit is cleared to 0 (n = 0 to 7).
In this mode, analog input pins are sequentially selected, from the ANI0 pin to the pin specified by the ADA0S
register, and their values are converted into digital values.
The result of each conversion is stored in the ADA0CRn register corresponding to the analog input pin. When
conversion of the analog input pin specified by the ADA0S register is complete, the INTAD signal is generated, and
A/D conversion is started again from the ANI0 pin, unless the ADA0CE bit is cleared to 0 (n = 0 to 7).
ADA0CR1
Figure 13-4. Timing Example of Continuous Select Mode Operation (ADA0S Register = 01H)
INTAD
ANI1
Conversion start
Set ADA0CE bit = 1
Data 1
Data 1
(ANI1)
Data 1
(ANI1)
Data
Data 2
(ANI1)
2
Data 2
(ANI1)
Data
Data 3
(ANI1)
3
Data 3
(ANI1)
Data
Data 4
(ANI1)
4
Data 5
Data
(ANI1)
Data 4
(ANI1)
Conversion start
Set ADA0CE bit = 1
CHAPTER 13 A/D CONVERTER
5
Data
Data 6
(ANI1)
6
Data 6
(ANI1)
Data
Data 7
(ANI1)
7
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