UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 299

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UPD70F3201YGC-YEU-A

Manufacturer Part Number
UPD70F3201YGC-YEU-A
Description
MCU 32BIT I2C 100TQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Sx2r
Datasheet

Specifications of UPD70F3201YGC-YEU-A

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
68
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 2.7 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3201YGC-YEU-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
12.4 Operation
12.4.1 Operation in normal mode
trigger.
12.4.2 Operation in real-time output mode
counters 2 and 3 (TM2 and TM3) as triggers.
D/A conversion is performed using a write operation to D/A conversion value setting register n (DACSn) as the
The setting method is described below.
<1> Set the DAMDn bit of the D/A converter mode register (DAM) to 0 (normal mode).
<2> Set the analog voltage value to be output to the ANOn pin to the DACSn register.
<3> Set the DACEn bit of the DAM register to 1 (D/A conversion enable).
<4> To perform subsequent D/A conversions, write to the DACSn register.
Remark
D/A conversion is performed using the interrupt request signals (INTTM2 and INTTM3) of 8-bit timer/event
The setting method is described below.
<1> Set the DAMDn bit of the DAM register to 1 (real-time output mode).
<2> Set the analog voltage value to be output to the ANOn pin to the DACSn register.
<3> Set the DACEn bit of the DAM register to 1 (D/A conversion enable).
<4> Operate 8-bit timer/event counters 2 and 3 (TM2 and TM3).
<5> D/A conversion starts when the INTTM2 and INTTM3 signals are generated.
<6> The INTTM2 and INTTM3 signals are generated when subsequent D/A conversions are performed.
Steps <1> and <2> above constitute the initial settings.
D/A conversion starts when this setting is performed.
The previous D/A conversion result is held until the next D/A conversion is performed.
Steps <1> to <3> above constitute the initial settings.
Before performing the next D/A conversion (generation of INTTM2 and INTTM3 signals), set the analog
voltage value to be output to the ANOn pin to the DACSn register.
n = 0, 1
CHAPTER 12 D/A CONVERTER
User’s Manual U15905EJ2V1UD
297

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