UPD70F3743GJ-GAE-AX Renesas Electronics America, UPD70F3743GJ-GAE-AX Datasheet - Page 699

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UPD70F3743GJ-GAE-AX

Manufacturer Part Number
UPD70F3743GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet

Specifications of UPD70F3743GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
128
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3743GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD70F3743GJ-GAE-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
V850ES/JJ3
R01UH0016EJ0400 Rev.4.00
Sep 30, 2010
(2) External interrupt falling, rising edge specification register 3 (INTF3, INTR3)
Remark
The INTF3 and INTR3 registers are 8-bit registers that specify detection of the falling and rising edges of the
external interrupt pin (INTP7).
These registers can be read or written in 8-bit or 1-bit units.
Reset sets these registers to 00H.
Cautions 1. When the function is changed from the external interrupt function (alternate function) to the
Caution Be sure to clear the INTF31 and INTR31 bits to 00 when these registers are not used as INTP7
INTF31
For how to specify a valid edge, see Table 19-4.
2. The INTP7 pin and RXDA0 pin are alternate-function pins. When using the pin as the RXDA0
INTR3
0
0
1
1
INTF3
After reset: 00H
pin.
port function, an edge may be detected. Therefore, clear the INTF31 and INTR31 bits to 00,
and then set the port mode.
pin, disable edge detection for the INTP7 alternate-function pin (clear the INTF3.INTF31 bit
and the INRT3.INTR31 bit to 0). When using the pin as the INTP7 pin, stop UARTA0 reception
(clear the UA0CTL0.UA0RXE bit to 0).
INTR31
0
0
0
1
0
1
R/W
0
0
Table 19-4. Valid Edge Specification
CHAPTER 19 INTERRUPT/EXCEPTION PROCESSING FUNCTION
No edge detected
Rising edge
Falling edge
Both rising and falling edges
Address: INTF3 FFFFFC06H, INTR3 FFFFFC26H
0
0
0
0
Valid Edge Specification
0
0
0
0
INTR31
INTF31
INTP7
INTP7
0
0
Page 683 of 892

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