UPD70F3744GJ-GAE-AX Renesas Electronics America, UPD70F3744GJ-GAE-AX Datasheet - Page 787

• Manufacturer Part Number: UPD70F3744GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3744GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 128
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JJ3
28.2.2 Maskable functions
R01UH0016EJ0400 Rev.4.00
Sep 30, 2010
Signal Name
SI/RxD
SO/TxD
SCK
CLK
RESET_OUT Output
FLMD0
FLMD1
HS
GND
RESET_IN
Only reset signals can be masked.
The maskable functions with the debugger (ID850QB) and the corresponding V850ES/JJ3 functions are listed below.
Pin Configuration of MINICUBE2 (QB-MINI2)
Input
Output
Output
Output
Output
Output
Input
Input
I/O
−
NMI0
NMI1
NMI2
STOP
HOLD
RESET
WAIT
Pin to receive commands and data from
V850ES/JJ3
Pin to transmit commands and data to
V850ES/JJ3
Clock output pin for 3-wire serial
communication
Clock output pin
Reset output pin to V850ES/JJ3
Output pin to set V850ES/JJ3 to debug
mode or programming mode
Output pin to set programming mode
Handshake signal for CSI0 + HS
communication
Ground
Reset input pin on the target system
Maskable Functions with ID850QB
Table 28-3. Wiring Between V850ES/JJ3 and MINICUBE2
Pin Function
Table 28-4. Maskable Functions
P41/SOB0
P40/SIB0
P42/SCKB0
Not needed
RESET
FLMD0
PCM0/WAIT
V
AV
EV
Reset signal generation by RESET pin input
PDL5/FLMD1
SS
Pin Name
With CSIB0-HS
SS
SS
Corresponding V850ES/JJ3 Functions
CHAPTER 28 ON-CHIP DEBUG FUNCTION
110 PDL5/FLMD1
103
No.
Pin
33,
23
22
24
14
85
11
−
8
2
P911/SOB3
P910/SIB3
P912/SCKB3
Not needed
RESET
FLMD0
PCM0/WAIT
V
AV
EV
−
−
−
−
−
−
SS
Pin Name
With CSIB3-HS
SS
SS
110 PDL5/FLMD1
103
No.
Pin
33,
72
71
73
14
85
11
−
8
2
P30/TXD0
P31/RXD0
Not needed
Not needed
RESET
FLMD0
Not needed
V
AV
EV
SS
Pin Name
SS
SS
With UARTA0
Page 771 of 892
110
103
Pin
No.
33,
25
26
14
11
−
−
8
−
2