SAF-C515C-8EM CA Infineon Technologies, SAF-C515C-8EM CA Datasheet - Page 29

• Manufacturer Part Number: SAF-C515C-8EM CA
• Description: IC MCU 8BIT OTP MQFP-80-1
• Manufacturer: Infineon Technologies
• Series: C5xx/C8xxr

Specifications of SAF-C515C-8EM CA

• Core Processor: C500
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: OTP
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 4.25 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-SQFP
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: USART, SSC
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 3
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Packages: PG-MQFP-80
• Max Clock Frequency: 10.0 MHz
• Sram (incl. Cache): 2.25 KByte
• Can Nodes: 1
• A / D Input Lines (incl. Fadc): 8
• Program Memory: 64.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: F515C8EMCANP; F515C8EMCAXT; SAF-C515C-8EMCA; SAF-C515C-8EMCA; SAF-C515C-8EMCAIN; SAFC515C8EMCAX; SP000068749; SP000106399

Table 4
Block
Serial
Channel
CAN
Controller
Data Sheet
Symbol
ADCON0
PCON
SBUF
SCON
SRELL
SRELH
CR
SR
IR
BTR0
BTR1
GMS0
GMS1
UGML0
UGML1
LGML0
LGML1
UMLM0
UMLM1
LMLM0
LMLM1
MCR0
MCR1
UAR0
UAR1
LAR0
LAR1
MCFG
DB0n
DB1n
DB2n
DB3n
DB4n
DB5n
DB6n
DB7n
Special Function Registers - Functional Block (cont’d)
1)
1)
Name
A/D Converter Control Register 0
Power Control Register
Serial Channel Buffer Register
Serial Channel Control Register
Serial Channel Reload Register, low byte
Serial Channel Reload Register, high byte
Control Register
Status Register
Interrupt Register
Bit Timing Register Low
Bit Timing Register High
Global Mask Short Register Low
Global Mask Short Register High
Upper Global Mask Long Register Low
Upper Global Mask Long Register High
Lower Global Mask Long Register Low
Lower Global Mask Long Register High
Upper Mask of Last Message Register
Low
Upper Mask of Last Message Register
High
Lower Mask of Last Message Register
Low
Lower Mask of Last Message Register
High
Message Object Registers:
Message Control Register Low
Message Control Register High
Upper Arbitration Register Low
Upper Arbitration Register High
Lower Arbitration Register Low
Lower Arbitration Register High
Message Configuration Register
Message Data Byte 0
Message Data Byte 1
Message Data Byte 2
Message Data Byte 3
Message Data Byte 4
Message Data Byte 5
Message Data Byte 6
Message Data Byte 7
25
Addr
D8
87
99
98
AA
BA
F700
F701
F702
F704
F705
F706
F707
F708
F709
F70A
F70B
F70C
F70D
F70E
F70F
F7n0
F7n1
F7n2
F7n3
F7n4
F7n5
F7n6
F7n7
F7n8
F7n9
F7nA
F7nB
F7nC
F7nD
F7nE
H
H
H
H
H
H
2)
2)
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
5)
5)
5)
5)
5)
5)
5)
5)
5)
5)
5)
5)
5)
5)
5)
Contents after
Reset
00
00
XX
00
D9
XXXXXX11
101
XX
XX
UU
0UUUUUUU
UU
UUU11111
UU
UU
UU
UUUUU000
UU
UU
UU
UUUUU000
UU
UU
UU
UU
UU
UUUUU000
UUUUUU00
XX
XX
XX
XX
XX
XX
XX
XX
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
3)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
6)
C515C
2003-02
B
B
B
B
B
B
6)
B
3)
6)
6)
6)
6)
6)