SAF-C515C-8EM CA Infineon Technologies, SAF-C515C-8EM CA Datasheet - Page 68

• Manufacturer Part Number: SAF-C515C-8EM CA
• Description: IC MCU 8BIT OTP MQFP-80-1
• Manufacturer: Infineon Technologies
• Series: C5xx/C8xxr

Specifications of SAF-C515C-8EM CA

• Core Processor: C500
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: OTP
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 4.25 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-SQFP
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: USART, SSC
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 3
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Packages: PG-MQFP-80
• Max Clock Frequency: 10.0 MHz
• Sram (incl. Cache): 2.25 KByte
• Can Nodes: 1
• A / D Input Lines (incl. Fadc): 8
• Program Memory: 64.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: F515C8EMCANP; F515C8EMCAXT; SAF-C515C-8EMCA; SAF-C515C-8EMCA; SAF-C515C-8EMCAIN; SAFC515C8EMCAX; SP000068749; SP000106399

Table 14
Lock Bits at
D1, D0
D1
1
1
0
0
Data Sheet
D0
1
0
1
0
Lock Bit Protection Types
Protection
Level
Level 0
Level 1
Level 2
Level 3
Protection Type
The OTP lock feature is disabled. During normal
operation of the C515C-8E, the state of the EA pin is
not latched on reset.
During normal operation of the C515C-8E, MOVC
instructions executed from external program memory
are disabled from fetching code bytes from internal
memory. EA is sampled and latched on reset. An OTP
memory read operation is only possible according to
ROM verification mode 2, as it is defined for a
protected ROM version of the C515C-8R. Further
programming of the OTP memory is disabled
(reprogramming security).
Same as level 1, but also OTP memory read operation
using ROM verification mode 2 is disabled.
Same as level 2; but additionally external code
execution by setting EA = low during normal operation
of the C515C-8E is no more possible.
External code execution, which is initiated by an
internal program (e.g. by an internal jump instruction
above the ROM boundary), is still possible.
64
C515C
2003-02