SAB-C167SR-LM HA+ Infineon Technologies, SAB-C167SR-LM HA+ Datasheet - Page 17

• Manufacturer Part Number: SAB-C167SR-LM HA+
• Description: IC MCU 16BIT MQFP-144
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAB-C167SR-LM HA+

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 144- BSQFP
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: 1xUSART, 1xSSC
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 9
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 16 Channel
• Packages: PG-MQFP-144
• Max Clock Frequency: 25.0 MHz
• Sram (incl. Cache): 4.0 KByte
• A / D Input Lines (incl. Fadc): 16
• Program Memory: 0.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: B167SRLMHAZNP; B167SRLMHAZXP; SABC167SRLMHAX; SP000103456

Table 2
Symbol Pin
RSTIN
RST
OUT
NMI
V
V
Data Sheet
AREF
AGND
No.
140
141
142
37
38
Pin Definitions and Functions P-MQFP-144-8 (cont’d)
Input
Outp.
I/O
O
I
–
–
Function
Reset Input with Schmitt-Trigger characteristics. A low level
at this pin while the oscillator is running resets the C167CR.
An internal pull-up resistor permits power-on reset using only
a capacitor connected to
A spike filter suppresses input pulses < 10 ns. Input pulses
> 100 ns safely pass the filter. The minimum duration for a
safe recognition should be 100 ns + 2 CPU clock cycles.
In bidirectional reset mode (enabled by setting bit BDRSTEN
in register SYSCON) the RSTIN line is internally pulled low
for the duration of the internal reset sequence upon any reset
(HW, SW, WDT). See note below this table.
Note: To let the reset configuration of PORT0 settle and to let
Internal Reset Indication Output. This pin is set to a low level
when the part is executing either a hardware-, a software- or
a watchdog timer reset. RSTOUT remains low until the EINIT
(end of initialization) instruction is executed.
Non-Maskable Interrupt Input. A high to low transition at this
pin causes the CPU to vector to the NMI trap routine. When
the PWRDN (power down) instruction is executed, the NMI
pin must be low in order to force the C167CR to go into power
down mode. If NMI is high, when PWRDN is executed, the
part will continue to run in normal mode.
If not used, pin NMI should be pulled high externally.
Reference voltage for the A/D converter.
Reference ground for the A/D converter.
the PLL lock a reset duration of ca. 1 ms is
recommended.
15
V
SS
.
General Device Information
V3.3, 2005-02
C167CR
C167SR