ATMEGA103L-4AI Atmel, ATMEGA103L-4AI Datasheet - Page 96
ATMEGA103L-4AI
Manufacturer Part Number
ATMEGA103L-4AI
Description
IC MCU 128K 4MHZ A/D LV 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATMEGA103-6AC.pdf
(141 pages)
2.ATMEGA103-6AC.pdf
(4 pages)
3.ATMEGA103L-4AC.pdf
(4 pages)
Specifications of ATMEGA103L-4AI
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Port D Schematics
96
ATmega103(L)
• IC1 – Port D, Bit 4
IC1, Input Capture pin for Timer/Counter1. When a positive or negative (selectable)
edge is applied to this pin, the contents of Timer/Counter1 is transferred to the
Timer/Counter1 Input Capture Register. The pin has to be configured as an input to
serve this function. See the Timer/Counter1 description on how to operate this function.
The internal pull-up MOS resistor can be activated as described above.
• T1 – Port D, Bit 6
T1, Timer/Counter1 counter source. See the Timer description for further details.
• T2 – Port D, Bit 7
T2, Timer/Counter2 counter source. See the Timer description for further details.
Note that all port pins are synchronized. The synchronization latches are, however, not
shown in the figures.
Figure 62. Port D Schematic Diagram (Pins PD0, PD1, PD2 and PD3)
PDn
MOS
PULL-
UP
WP:
WD:
RL:
RP:
RD:
n:
WRITE PORTD
WRITE DDRD
READ PORTD LATCH
READ PORTD PIN
READ DDRD
0, 1, 2, 3
RL
RP
Q
Q
PORTDn
RESET
RESET
DDDn
WD
WP
RD
R
C
R
C
INTn
D
D
0945I–AVR–02/07
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