AT89S8252-24PI Atmel, AT89S8252-24PI Datasheet - Page 25

• Manufacturer Part Number: AT89S8252-24PI
• Description: MCU W/SPI 8KB FLSH 2K EEP 40-DIP
• Manufacturer: Atmel
• Series: 89Sr

Specifications of AT89S8252-24PI

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: SPI, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 32
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -
• Other names: AT89S825224PI

Serial Downloading
Serial Programming
Algorithm
0401G–MICRO–3/06
Both the Code and Data memory arrays can be programmed using the serial SPI bus
while RST is pulled to V
MISO (output). After RST is set high, the Programming Enable instruction needs to be
executed first before program/erase operations can be executed.
An auto-erase cycle is built into the self-timed programming operation (in the serial
mode ONLY) and there is no need to first execute the Chip Erase instruction unless any
of the lock bits have been programmed. The Chip Erase operation turns the content of
every memory location in both the Code and Data arrays into FFH.
The Code and Data memory arrays have separate address spaces:
Either an external system clock is supplied at pin XTAL1 or a crystal needs to be con-
nected across pins XTAL1 and XTAL2. The maximum serial clock (SCK) frequency
should be less than 1/40 of the crystal frequency. With a 24 MHz oscillator clock, the
maximum SCK frequency is 600 kHz.
To program and verify the AT89S8252 in the serial programming mode, the following
sequence is recommended:
1. Power-up sequence:
2. Enable serial programming by sending the Programming Enable serial instruction to
3. The Code or Data array is programmed one byte at a time by supplying the address
4. Any memory location can be verified by using the Read instruction which returns the
5. At the end of a programming session, RST can be set low to commence normal
6. Power-off sequence (if needed):
0000H to 1FFFH for Code memory and 000H to 7FFH for Data memory.
Apply power between VCC and GND pins.
Set RST pin to “H”.
If a crystal is not connected across pins XTAL1 and XTAL2, apply a 3 MHz to
24 MHz clock to XTAL1 pin and wait for at least 10 milliseconds.
pin MOSI/P1.5. The frequency of the shift clock supplied at pin SCK/P1.7 needs to
be less than the CPU clock at XTAL1 divided by 40.
and data together with the appropriate Write instruction. The selected memory loca-
tion is first automatically erased before new data is written. The write cycle is self-
timed and typically takes less than 2.5 ms at 5V.
content at the selected address at serial output MISO/P1.6.
operation.
Set XTAL1 to “L” (if a crystal is not used).
Set RST to “L”.
Turn V
CC
power off.
CC
. The serial interface consists of pins SCK, MOSI (input) and
AT89S8252
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