ATMEGA88-20PU Atmel, ATMEGA88-20PU Datasheet - Page 293
ATMEGA88-20PU
Manufacturer Part Number
ATMEGA88-20PU
Description
IC AVR MCU 8K 20MHZ 5V 28DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA88-20PU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SPI/TWI/USART
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
6-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRTS2080A, ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
Package
28PDIP
Family Name
ATmega
Maximum Speed
20 MHz
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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27.7.5
2545S–AVR–07/10
Programming the EEPROM
Figure 27-2. Addressing the Flash Which is Organized in Pages
Note:
Figure 27-3. Programming the Flash Waveforms
Note:
The EEPROM is organized in pages, see
EEPROM, the program data is latched into a page buffer. This allows one page of data to be
programmed simultaneously. The programming algorithm for the EEPROM data memory is as
follows (refer to
Data loading):
1. A: Load Command “0001 0001”.
2. G: Load Address High Byte (0x00 - 0xFF).
3. B: Load Address Low Byte (0x00 - 0xFF).
4. C: Load Data (0x00 - 0xFF).
RESET +12V
RDY/BSY
PAGEL
1. PCPAGE and PCWORD are listed in
XTAL1
1. “XX” is don’t care. The letters refer to the programming description above.
DATA
XA1
XA0
BS1
BS2
WR
OE
PROGRAM MEMORY
PROGRAM
COUNTER
0x10
PAGE
“Programming the Flash” on page 291
A
PAGE ADDRESS
WITHIN THE FLASH
ADDR. LOW
B
PCMSB
DATA LOW
C
PCPAGE
DATA HIGH
D
XX
E
PAGEMSB
ADDR. LOW
Table 27-10 on page
PCWORD
B
Table 27-9 on page
WORD ADDRESS
WITHIN A PAGE
DATA LOW
(1)
C
F
DATA HIGH
INSTRUCTION WORD
D
for details on Command, Address and
PAGE
XX
ATmega48/88/168
E
288.
(1)
ADDR. HIGH
288. When programming the
G
H
PCWORD[PAGEMSB:0]:
XX
00
01
02
PAGEEND
293
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