ATMEGA88-20PU Atmel, ATMEGA88-20PU Datasheet - Page 98
ATMEGA88-20PU
Manufacturer Part Number
ATMEGA88-20PU
Description
IC AVR MCU 8K 20MHZ 5V 28DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA88-20PU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SPI/TWI/USART
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
6-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRTS2080A, ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
Package
28PDIP
Family Name
ATmega
Maximum Speed
20 MHz
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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98
Timer/Counter Timing Diagrams
ATmega48/88/168
• The timer starts counting from a value higher than the one in OCRnx, and for that reason
The Timer/Counter is a synchronous design and the timer clock (clk
clock enable signal in the following figures. The figures include information on when interrupt
flags are set.
shows the count sequence close to the MAX value in all modes other than phase correct PWM
mode.
Figure 14-8. Timer/Counter Timing Diagram, no Prescaling
Figure 14-9
Figure 14-9. Timer/Counter Timing Diagram, with Prescaler (f
Figure 14-10
mode and PWM mode, where OCR0A is TOP.
symmetry around BOTTOM the OCnx value at MAX must correspond to the result of an up-
counting Compare Match.
misses the Compare Match and hence the OCnx change that would have happened on the
way up.
TCNTn
TCNTn
(clk
(clk
TOVn
TOVn
clk
clk
clk
clk
I/O
I/O
I/O
I/O
Tn
Tn
/1)
/8)
shows the same timing data, but with the prescaler enabled.
shows the setting of OCF0B in all modes and OCF0A in all modes except CTC
Figure 14-8
MAX - 1
MAX - 1
contains timing data for basic Timer/Counter operation. The figure
MAX
MAX
BOTTOM
BOTTOM
clk_I/O
/8)
T0
) is therefore shown as a
BOTTOM + 1
BOTTOM + 1
2545S–AVR–07/10
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