Z8F3201VN020EC00TR Zilog, Z8F3201VN020EC00TR Datasheet - Page 59

• Manufacturer Part Number: Z8F3201VN020EC00TR
• Description: IC ENCORE MCU FLASH 32K 44PLCC
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F3201VN020EC00TR

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 44-LCC (J-Lead)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: Z8F3201VN020EC00T

Table 18. Port A-H High Drive Enable Sub-Registers
PS017610-0404
RESET
FIELD
ADDR
BITS
R/W
PHDE7
R/W
7
0
Port A-H High Drive Enable Sub-Registers
The Port A-H High Drive Enable sub-register (Table 18) is accessed through the Port A-H
Control register by writing
Port A-H High Drive Enable sub-registers to 1 configures the specified port pins for high
current output drive operation. The Port A-H High Drive Enable sub-register affects the
pins directly and, as a result, alternate functions are also affected.
PHDE[7:0]—Port High Drive Enabled
0 = The Port pin is configured for standard output current drive.
1 = The Port pin is configured for high output current drive.
Port A-H Stop Mode Recovery Source Enable Sub-Registers
The Port A-H STOP Mode Recovery Source Enable sub-register (Table 19) is accessed
through the Port A-H Control register by writing
Setting the bits in the Port A-H STOP Mode Recovery Source Enable sub-registers to 1
configures the specified Port pins as a STOP Mode Recovery source. During STOP Mode,
any logic transition on a Port pin enabled as a STOP Mode Recovery source initiates
STOP Mode Recovery.
If 04H in Port A-H Address Register, accessible via Port A-H Control Register
PHDE6
R/W
6
0
PHDE5
R/W
5
0
04H
to the Port A-H Address register. Setting the bits in the
PHDE4
R/W
4
0
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
PHDE3
R/W
3
0
05H
to the Port A-H Address register.
PHDE2
R/W
2
0
PHDE1
General-Purpose I/O
R/W
1
0
Z8 Encore!
PHDE0
R/W
0
0
®
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