Z8F3201VN020EC00TR Zilog, Z8F3201VN020EC00TR Datasheet - Page 88

IC ENCORE MCU FLASH 32K 44PLCC

Z8F3201VN020EC00TR

Manufacturer Part Number
Z8F3201VN020EC00TR
Description
IC ENCORE MCU FLASH 32K 44PLCC
Manufacturer
Zilog
Series
Encore!®r
Datasheet

Specifications of Z8F3201VN020EC00TR

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
44-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
Z8F3201VN020EC00T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F3201VN020EC00TR
Manufacturer:
Zilog
Quantity:
10 000
Table 44. Timer 0-3 Control Register (TxCTL)
PS017610-0404
RESET
FIELD
ADDR
BITS
R/W
Timer 0-3 Control Registers
TEN
R/W
7
0
The Timer 0-3 Control (TxCTL) registers enable/disable the timers, set the prescaler
value, and determine the timer operating mode.
TEN—Timer Enable
0 = Timer is disabled.
1 = Timer enabled to count.
TPOL—Timer Input/Output Polarity
Operation of this bit is a function of the current operating mode of the timer.
One-Shot mode
When the timer is disabled, the Timer Output signal is set to the value of this bit.
When the timer is enabled, the Timer Output signal is complemented upon timer
Reload.
Continuous mode
When the timer is disabled, the Timer Output signal is set to the value of this bit.
When the timer is enabled, the Timer Output signal is complemented upon timer
Reload.
Counter mode
When the timer is disabled, the Timer Output signal is set to the value of this bit.
When the timer is enabled, the Timer Output signal is complemented upon timer
Reload.
PWM mode
0 = Timer Output is forced Low (0) when the timer is disabled. When enabled, the
Timer Output is forced High (1) upon PWM count match and forced Low (0) upon
Reload.
1 = Timer Output is forced High (1) when the timer is disabled. When enabled, the
Timer Output is forced Low (0) upon PWM count match and forced High (1) upon
Reload.
TPOL
R/W
6
0
R/W
5
0
F07H, F0FH, F17H, F1FH
PRES
R/W
4
0
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
R/W
3
0
R/W
2
0
TMODE
R/W
1
0
Z8 Encore!
R/W
Timers
0
0
®
70

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