COP8SGR7HLQ8 National Semiconductor, COP8SGR7HLQ8 Datasheet - Page 27

• Manufacturer Part Number: COP8SGR7HLQ8
• Description: IC MCU OTP 8BIT 32K 2-COMP 44LLP
• Manufacturer: National Semiconductor
• Series: COP8™ 8SGr

Specifications of COP8SGR7HLQ8

• Core Processor: COP8
• Core Size: 8-Bit
• Speed: 15MHz
• Connectivity: Microwire/Plus (SPI), UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 40
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: EPROM, UV
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LLP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: COP8SGR7HLQ8TR

7.0 Power Saving Features
7.3 MULTI-INPUT WAKEUP
The Multi-Input Wakeup feature is used to return (wakeup)
the device from either the HALT or IDLE modes. Alternately
Multi-Input Wakeup/Interrupt feature may also be used to
generate up to 8 edge selectable external interrupts.
Figure 20 shows the Multi-Input Wakeup logic.
The Multi-Input Wakeup feature utilizes the L Port. The user
selects which particular L port bit (or combination of L Port
bits) will cause the device to exit the HALT or IDLE modes.
The selection is done through the register WKEN. The reg-
ister WKEN is an 8-bit read/write register, which contains a
control bit for every L port bit. Setting a particular WKEN bit
enables a Wakeup from the associated L port pin.
The user can select whether the trigger condition on the
selected L Port pin is going to be either a positive edge (low
to high transition) or a negative edge (high to low transition).
This selection is made via the register WKEDG, which is an
8-bit control register with a bit assigned to each L Port pin.
Setting the control bit will select the trigger condition to be a
negative edge on that particular L Port pin. Resetting the bit
selects the trigger condition to be a positive edge. Changing
an edge select entails several steps in order to avoid a
Wakeup condition as a result of the edge change. First, the
associated WKEN bit should be reset, followed by the edge
select change in WKEDG. Next, the associated WKPND bit
should be cleared, followed by the associated WKEN bit
being re-enabled.
An example may serve to clarify this procedure. Suppose we
wish to change the edge select from positive (low going high)
FIGURE 20. Multi-Input Wake Up Logic
(Continued)
27
to negative (high going low) for L Port bit 5, where bit 5 has
previously been enabled for an input interrupt. The program
would be as follows:
If the L port bits have been used as outputs and then
changed to inputs with Multi-Input Wakeup/Interrupt, a safety
procedure should also be followed to avoid wakeup condi-
tions. After the selected L port bits have been changed from
output to input but before the associated WKEN bits are
enabled, the associated edge select bits in WKEDG should
be set or reset for the desired edge selects, followed by the
associated WKPND bits being cleared.
This same procedure should be used following reset, since
the L port inputs are left floating as a result of reset.
The occurrence of the selected trigger condition for Multi-
Input Wakeup is latched into a pending register called WK-
PND. The respective bits of the WKPND register will be set
on the occurrence of the selected trigger edge on the corre-
sponding Port L pin. The user has the responsibility of clear-
ing these pending flags. Since WKPND is a pending register
for the occurrence of selected wakeup conditions, the device
will not enter the HALT mode if any Wakeup bit is both
enabled and pending. Consequently, the user must clear the
pending flags before attempting to enter the HALT mode.
WKEN and WKEDG are all read/write registers, and are
cleared at reset. WKPND register contains random value
after reset.
RBIT
SBIT
RBIT
SBIT
5, WKEN
5, WKEDG
5, WKPND
5, WKEN
; Disable MIWU
; Change edge polarity
; Reset pending flag
; Enable MIWU
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