MC68HC908GR16CFJ Freescale Semiconductor, MC68HC908GR16CFJ Datasheet - Page 242

• Manufacturer Part Number: MC68HC908GR16CFJ
• Description: IC MCU 16K FLASH 8MHZ SPI 32LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GR16CFJ

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Development Support
19.3 Monitor ROM (MON)
This section describes the monitor ROM (MON) and the monitor mode entry methods. The monitor ROM
allows complete testing of the microcontroller unit (MCU) through a single-wire interface with a host
computer. Monitor mode entry can be achieved without use of the higher test voltage, V
vector addresses $FFFE and $FFFF are blank, thus reducing the hardware requirements for in-circuit
programming.
Features of the monitor ROM include:
19.3.1 Functional Description
Figure 19-9
The monitor ROM receives and executes commands from a host computer.
Figure 19-10
a host computer via a standard RS-232 interface.
Simple monitor commands can access any memory address. In monitor mode, the MCU can execute
code downloaded into RAM by a host computer while most MCU pins retain normal operating mode
functions. All communication between the host computer and the MCU is through the PTA0 pin. A
level-shifting and multiplexing interface is required between PTA0 and the host computer. PTA0 is used
in a wired-OR configuration and requires a pullup resistor.
Table 19-1
may be entered after a power-on reset (POR) and will allow communication at 14,400 baud provided one
of the following sets of conditions is met:
242
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the FLASH difficult
•
•
•
•
•
•
•
•
•
•
•
•
for unauthorized users.
Normal user-mode pin functionality
One pin dedicated to serial communication between monitor read-only memory (ROM) and host
computer
Standard mark/space non-return-to-zero (NRZ) communication with host computer
Standard communication baud rate (9,600 @ 2.4576-MHz bus frequency)
Execution of code in random-access memory (RAM) or FLASH
FLASH memory security feature
FLASH memory programming interface
350 bytes monitor ROM code size ($FE20 to $FF6A)
Monitor mode entry without high voltage, V
$FF)
Normal monitor mode entry if high voltage is applied to IRQ
If $FFFE and $FFFF does not contain $FF (programmed state):
–
–
–
If $FFFE and $FFFF do not contain $FF (programmed state):
–
–
–
The external clock is 4.9152 MHz
PTB4 = low
IRQ = V
The external clock is 9.8304 MHz
PTB4 = high
IRQ = V
shows the pin conditions for entering monitor mode. As specified in the table, monitor mode
shows a simplified diagram of the monitor mode.
and
Figure 19-11
TST
TST
show example circuits used to enter monitor mode and communicate with
MC68HC908GR16 Data Sheet, Rev. 5.0
(1)
TST
, if reset vector is blank ($FFFE and $FFFF contain
Freescale Semiconductor
TST
, as long as