MC68HC908GR16CFJ Freescale Semiconductor, MC68HC908GR16CFJ Datasheet - Page 69

• Manufacturer Part Number: MC68HC908GR16CFJ
• Description: IC MCU 16K FLASH 8MHZ SPI 32LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GR16CFJ

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

4.5 CGM Registers
These registers control and monitor operation of the CGM:
Figure 4-3
Freescale Semiconductor
NOTES:
Addr.
$003A
$003B
$0036
$0037
$0038
$0039
1. When AUTO = 0, PLLIE is forced clear and is read-only.
2. When AUTO = 0, PLLF and LOCK read as clear.
3. When AUTO = 1, ACQ is read-only.
4. When PLLON = 0 or VRS7:VRS0 = $0, BCS is forced clear and is read-only.
5. When PLLON = 1, the PLL programming register is read-only.
6. When BCS = 1, PLLON is forced set and is read-only.
•
•
•
•
•
•
PLL control register (PCTL) — see
PLL bandwidth control register (PBWC) — see
PLL multiplier select register high (PMSH) — see
PLL multiplier select register low (PMSL) — see
PLL VCO range select register (PMRS) — see
PLL reference divider select register (PMDS) — see
PLL Control Register (PCTL)
PLL Bandwidth Control Reg-
PLL Multiplier Select High
PLL Multiplier Select Low
Select Register (PMDS)
PLL VCO Select Range
is a summary of the CGM registers.
PLL Reference Divider
Register Name
Register (PMSH)
Register (PMRS)
Register (PMSL)
See page 70.
See page 72.
See page 73.
See page 73.
See page 74.
See page 74.
ister (PBWC)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Figure 4-3. CGM I/O Register Summary
PLLIE
AUTO
MUL7
VRS7
MC68HC908GR16 Data Sheet, Rev. 5.0
Bit 7
0
0
0
0
0
0
0
0
= Unimplemented
4.5.1 PLL Control
LOCK
MUL6
VRS6
PLLF
6
0
0
0
0
1
1
0
0
PLLON
MUL5
VRS5
ACQ
4.5.5 PLL VCO Range Select
4.5.2 PLL Bandwidth Control
5
1
0
0
0
0
0
0
0
4.5.4 PLL Multiplier Select Register
4.5.3 PLL Multiplier Select Register
4.5.6 PLL Reference Divider Select
Register.
MUL4
VRS4
BCS
R
4
0
0
0
0
0
0
0
0
0
= Reserved
MUL11
MUL3
RDS3
PRE1
VRS3
3
0
0
0
0
0
0
0
MUL10
MUL2
RDS2
PRE0
VRS2
2
0
0
0
0
0
0
0
Register.
Register.
VPR1
MUL9
MUL1
RDS1
VRS1
1
0
0
0
0
0
0
0
CGM Registers
Low.
High.
Register.
VPR0
MUL8
MUL0
VRS0
RDS0
Bit 0
R
0
0
0
0
0
1
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