MC68HC908MR8CP Freescale Semiconductor, MC68HC908MR8CP Datasheet - Page 191

• Manufacturer Part Number: MC68HC908MR8CP
• Description: IC MCU 8K FLASH 8MHZ PWM 28-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908MR8CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 12
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

10.4.3 Baud Rate
10.4.4 Data Format
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
With a 4.0-MHz reference clock source, data is transferred between the
monitor and host at 9600 baud. The communication baud rate is
achieved by stepping up the internal CPU frequency to 8 MHz, using the
phase-locked loop (PLL). A 4.0-MHz reference frequency is necessary
in this mode as the PLL will not lock with any other reference clock.
As described in
with $FFFE and $FFFF = 0, the PLL setup is bypassed and the baud rate
is equal to the reference frequency divided by 1024. This facilitates a
faster communication rate in the interest of a first time programmed
device. This allows selection of other reference frequencies and thus,
facilities a faster communication rate. The reference frequency, in this
case while not utilizing the PLL, is limited to the range of f
21.8 Control
Communication with the monitor ROM is in standard non-return-to-zero
(NRZ) mark/space data format. See
The data transmit and receive rate is 9600 baud. Transmit and receive
baud rates will be identical.
BREAK
$A5
START
BIT
START
START
BIT
BIT
BIT 0
BIT 0
BIT 0
Timing.
Figure 10-3. Sample Monitor Waveforms
Monitor ROM (MON)
Table
BIT 1
Figure 10-2. Monitor Data Format
BIT 1
BIT 1
BIT 2
10-1, on FLASH parts when V
BIT 2
BIT 2
BIT 3
BIT 3
BIT 3
BIT 4
BIT 4
BIT 4
Figure 10-2
BIT 5
BIT 5
BIT 5
BIT 6
BIT 6
BIT 6
BIT 7
and
BIT 7
BIT 7
SS
Functional Description
Figure
Monitor ROM (MON)
STOP
is applied to IRQ
BIT
STOP
STOP
BIT
BIT
OP
Technical Data
START
NEXT
. Refer to
BIT
START
START
10-3.
NEXT
NEXT
BIT
BIT
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