R5F21238JFP#U0 Renesas Electronics America, R5F21238JFP#U0 Datasheet - Page 34

IC R8C/23 MCU FLASH 64K 48LQFP

R5F21238JFP#U0

Manufacturer Part Number
R5F21238JFP#U0
Description
IC R8C/23 MCU FLASH 64K 48LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Datasheet

Specifications of R5F21238JFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21238JFP#U0R5F21238JFP
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
R5F21238JFP#U0R5F21238JFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
R5F21238JFP#U0R5F21238JFP#V0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
R5F21238JFP#U0R5F21238JFP#W4
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
2.8.7
2.8.8
2.8.9
2.8.10
The I flag enables a maskable interrupt.
An interrupt is disabled when the I flag is set to 0, and are enabled when the I flag is set to 1. The I flag is set to
0 when an interrupt request is acknowledged.
ISP is selected when the U flag is set to 0; USP is selected when the U flag is set to 1.
The U flag is set to 0 when a hardware interrupt request is acknowledged or the INT instruction of software
interrupt numbers. 0 to 31 is executed.
IPL, 3 bits wide, assigns processor interrupt priority levels from level 0 to level 7.
If a requested interrupt has greater priority than IPL, the interrupt is enabled.
If necessary, set to 0. When read, the content is undefined.
Interrupt Enable Flag (I)
Stack Pointer Select Flag (U)
Processor Interrupt Priority Level (IPL)
Reserved Bit
Page 12 of 501
2. Central Processing Unit (CPU)

Related parts for R5F21238JFP#U0